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path:
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target-sparc
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translate.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
Convert basic float32 ops to TCG
blueswir1
2008-09-10
1
-150
/
+247
*
Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG
blueswir1
2008-09-09
1
-8
/
+23
*
Fix a typo in fpsub32
blueswir1
2008-09-06
1
-1
/
+1
*
Convert most env fields to TCG registers
blueswir1
2008-09-06
1
-95
/
+91
*
Silence gcc warning about constant overflow
blueswir1
2008-09-06
1
-2
/
+2
*
Fix sign extension problems with smul and umul (Vince Weaver)
blueswir1
2008-09-02
1
-4
/
+4
*
Fix y register loads and stores
blueswir1
2008-09-01
1
-18
/
+16
*
Fix FCC handling for Sparc64 target, initial patch by Vince Weaver
blueswir1
2008-08-29
1
-4
/
+2
*
Fix wrwim masking (Luis Pureza)
blueswir1
2008-08-21
1
-0
/
+3
*
Use initial CPU definition structure for some CPU fields instead of copying
blueswir1
2008-08-21
1
-10
/
+7
*
Correct 32bit carry flag for add instruction (Igor Kovalenko)
blueswir1
2008-08-17
1
-5
/
+8
*
Fix Sparc64 shifts
blueswir1
2008-08-06
1
-5
/
+3
*
Fix offset handling for ASI loads and stores (Vince Weaver)
blueswir1
2008-08-06
1
-3
/
+1
*
Fix cmp/subcc/addcc op bugs reported by Vince Weaver
blueswir1
2008-07-29
1
-4
/
+4
*
Make UA200x features selectable, add MMU types
blueswir1
2008-07-20
1
-0
/
+6
*
Implement nucleus quad ldda
blueswir1
2008-07-19
1
-16
/
+12
*
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
ths
2008-07-18
1
-7
/
+6
*
wrhpr hstick_cmpr is a store, not a load
blueswir1
2008-07-18
1
-3
/
+2
*
Support for address masking
blueswir1
2008-07-17
1
-22
/
+36
*
Flushw can generate exceptions, so save PC & NPC
blueswir1
2008-07-16
1
-0
/
+1
*
Really fix cas
blueswir1
2008-07-15
1
-6
/
+5
*
Add instruction counter.
pbrook
2008-06-29
1
-1
/
+19
*
Eliminate cpu_T[0]
blueswir1
2008-06-22
1
-9
/
+9
*
Eliminate cpu_T[1]
blueswir1
2008-06-22
1
-4
/
+3
*
Convert some cpu_dst uses (with loads/stores) to cpu_tmp0
blueswir1
2008-06-21
1
-67
/
+67
*
Avoid brcond problems, use temps for cpu_src1 & cpu_src2
blueswir1
2008-06-21
1
-35
/
+32
*
Avoid temporary variable use across basic blocks for udivx
blueswir1
2008-06-15
1
-2
/
+4
*
Allow NWINDOWS selection (CPU feature with model specific defaults)
blueswir1
2008-06-07
1
-2
/
+0
*
MicroSparc I didn't have fsmuld op
blueswir1
2008-05-29
1
-0
/
+1
*
Free temps
blueswir1
2008-05-27
1
-109
/
+313
*
More TCG type fixes
blueswir1
2008-05-26
1
-11
/
+8
*
Fix cas on i386
blueswir1
2008-05-26
1
-1
/
+1
*
remove absolete function
bellard
2008-05-25
1
-5
/
+0
*
Nicer debug output
blueswir1
2008-05-25
1
-0
/
+2
*
More TCGv type fixes.
pbrook
2008-05-24
1
-1
/
+2
*
Fix ARM conditional branch bug.
pbrook
2008-05-24
1
-31
/
+30
*
Fix helper operand type mismatch.
pbrook
2008-05-24
1
-1
/
+2
*
Register op helpers
blueswir1
2008-05-22
1
-0
/
+5
*
Generate better code for Sparc32 shifts
blueswir1
2008-05-17
1
-6
/
+21
*
Wrap long lines
blueswir1
2008-05-12
1
-86
/
+175
*
Remove someexplicit alignment checks (initial patch by Fabrice Bellard)
blueswir1
2008-05-11
1
-44
/
+32
*
Add a TODO file
blueswir1
2008-05-10
1
-8
/
+0
*
suppressed fixed registers
bellard
2008-05-10
1
-21
/
+8
*
Fix compiler warnings
blueswir1
2008-05-10
1
-3
/
+0
*
CPU feature selection support
blueswir1
2008-05-09
1
-144
/
+135
*
Simplify some constant loads
blueswir1
2008-05-07
1
-17
/
+14
*
Fix potential condition code problems
blueswir1
2008-05-07
1
-46
/
+58
*
Complete the TCG conversion
blueswir1
2008-05-04
1
-36
/
+21
*
Avoid some brconds
blueswir1
2008-05-04
1
-24
/
+12
*
Use memory based registers in functions containing brconds
blueswir1
2008-05-03
1
-44
/
+57
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