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* Move non-op functions from op_helper.c to helper.c and vice versa.blueswir12008-05-271-234/+13
* Fix off-by-one unwinding error.pbrook2008-05-251-6/+0
* Remove currently unnecessary alignment maskingblueswir12008-05-201-57/+57
* Wrap long linesblueswir12008-05-121-44/+84
* Remove someexplicit alignment checks (initial patch by Fabrice Bellard)blueswir12008-05-111-54/+80
* suppressed fixed registersbellard2008-05-101-28/+1
* Fix compiler warningsblueswir12008-05-101-3/+3
* CPU feature selection supportblueswir12008-05-091-47/+56
* Move #include to speed up compilationblueswir12008-05-091-0/+3
* Complete the TCG conversionblueswir12008-05-041-0/+103
* Revert the previous patchblueswir12008-04-221-0/+108
* Move 128-bit float emulation under linux-userblueswir12008-04-221-108/+0
* Convert align checks to TCGblueswir12008-03-211-0/+6
* Convert save, restore, saved, restored, and flushw to TCGblueswir12008-03-211-0/+92
* Convert other float and VIS ops to TCGblueswir12008-03-211-34/+614
* Convert udiv and sdiv ops to TCGblueswir12008-03-181-0/+44
* Convert CCR and CWP ops to TCGblueswir12008-03-181-0/+21
* Convert array8/16/32 and alignaddr to TCGblueswir12008-03-181-0/+31
* Convert ldfsr and stfsr to TCGblueswir12008-03-151-1/+8
* Convert Sparc64 trap state ops to TCGblueswir12008-03-051-17/+21
* Convert float helpers to TCG, fix fabsq in the processblueswir12008-03-041-22/+13
* Modify Sparc32/64 to use TCGblueswir12008-02-241-280/+318
* Sparc32 MMU register fixes (Robert Reif)blueswir12008-02-111-8/+14
* More ASIsblueswir12008-01-011-6/+18
* Nicer debug output for exceptionsblueswir12007-12-301-4/+104
* Initial support for Sun4d machines (SS-1000, SS-2000)blueswir12007-12-281-3/+1
* Improved ASI debugging (Robert Reif)blueswir12007-12-281-14/+58
* Add ASIs (Robert Reif)blueswir12007-12-101-1/+8
* Fix compilation and warnings on PPC hostblueswir12007-11-281-0/+17
* 128-bit float support for user modeblueswir12007-11-251-0/+39
* More MMU registers (Robert Reif)blueswir12007-11-251-6/+17
* Fix MXCC register 64 bit read word order (Robert Reif)blueswir12007-11-191-4/+4
* Break up vl.h.pbrook2007-11-171-24/+0
* Remove unnecessary register masking (Robert Reif)blueswir12007-11-171-5/+5
* Fix MXCC error register (Robert Reif)blueswir12007-11-171-4/+2
* Add MXCC module reset register (Robert Reif)blueswir12007-11-171-0/+8
* removed warningbellard2007-11-111-1/+1
* CPU specific boot mode (Robert Reif)blueswir12007-11-071-2/+2
* Adjust s390 addresses (the MSB is defined as "to be ignored").ths2007-10-291-1/+5
* Use shared ctpop64 helperblueswir12007-10-281-6/+2
* Avoid gcc warningsblueswir12007-10-201-2/+2
* Fix compiling Sparc64 on PPC hostblueswir12007-10-201-0/+15
* Use ldq and stq for 8 byte accesses (original patch by Robert Reif)blueswir12007-10-171-21/+22
* Fix bug in Sparc32 sta op (Robert Reif)blueswir12007-10-141-1/+1
* Sparc64 hypervisor modeblueswir12007-10-141-30/+68
* SuperSparc MXCC support (Robert Reif)blueswir12007-10-141-16/+151
* Replace is_user variable with mmu_idx in softmmu core,j_mayer2007-10-141-2/+2
* Fix block load ASIsblueswir12007-10-011-9/+25
* Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructionsblueswir12007-09-301-0/+73
* CPU boot modeblueswir12007-09-241-2/+2
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