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* SH4: Privilege check for instructionsaurel322008-09-151-24/+43
* sh4: doesn't set the cpu_model_straurel322008-09-151-0/+1
* SH4: sleep instruction bug fixaurel322008-09-151-1/+1
* sh4: CPU versioning.aurel322008-09-021-0/+59
* SH4: fix a regression introduced in r5122aurel322008-09-021-1/+1
* SH4: Remove dyngen leftoversaurel322008-09-011-5/+0
* SH4: final conversion to TCGaurel322008-09-011-1/+7
* SH4: convert floating-point ops to TCGaurel322008-09-011-153/+249
* SH4: Remove most uses of cpu_T[0] and cpu_T[1]aurel322008-09-011-181/+427
* SH4: TCG optimisationsaurel322008-09-011-349/+236
* SH4: Convert remaining non-fp ops to TCGaurel322008-09-011-28/+109
* SH4: Convert shift functions to TCGaurel322008-08-301-3/+9
* SH4: convert control/status register load/store to TCGaurel322008-08-301-36/+58
* SH4: Convert memory loads/stores to TCGaurel322008-08-301-86/+58
* SH4: convert some more arithmetics ops to TCGaurel322008-08-301-44/+44
* SH4: convert a few helpers to TCGaurel322008-08-291-11/+13
* SH4: convert branch/jump instructions to TCGaurel322008-08-291-19/+54
* SH4: convert simple compare instructions to TCGaurel322008-08-291-15/+53
* SH4: convert a few control or system register functions to TCGaurel322008-08-291-15/+46
* SH4: Fix bugs introduce in r5099aurel322008-08-291-8/+8
* SH4: fix xtrct Rm,Rn (broken in r5103)aurel322008-08-291-1/+1
* SH4: convert logic and arithmetic ops to TCGaurel322008-08-291-101/+111
* SH4: use TCG variables for gregsaurel322008-08-291-200/+202
* SH4: use uint32_t/i32 based types/opsaurel322008-08-281-30/+30
* SH4: Convert register moves to TCGaurel322008-08-281-177/+209
* SH4: Convert dyngen registers moves to TCGaurel322008-08-281-9/+9
* SH4: Convert immediate loads to TCGaurel322008-08-281-4/+4
* SH4: add support for TCG helpersaurel322008-08-281-0/+7
* SH4: Init TCG variablesaurel322008-08-281-1/+3
* sh4: fix tas.b @Rn instructionaurel322008-08-221-1/+6
* [sh4] code translation bug fixaurel322008-08-221-4/+18
* [sh4] delay slot bug fixaurel322008-08-221-0/+13
* [sh4] sleep instructionaurel322008-08-221-1/+6
* Fix warnings that would be generated by gcc -Wstrict-prototypesblueswir12008-08-171-1/+1
* Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths2008-07-181-6/+5
* Add missing static qualifiers.pbrook2008-06-291-1/+1
* Add instruction counter.pbrook2008-06-291-0/+31
* SH4 MMU improvementsaurel322008-05-091-0/+4
* Factorize code in translate.caurel322008-04-281-0/+7
* Remove osdep.c/qemu-img code duplicationaurel322008-04-111-0/+1
* SH4, fix several instructionsaurel322008-03-111-51/+82
* use the TCG code generatorbellard2008-02-011-40/+10
* SH4 delay slot code update, by Magnus Damm.ths2007-12-021-45/+72
* fixed FPU rounding initbellard2007-11-111-2/+2
* added cpu_model parameter to cpu_init()bellard2007-11-101-1/+1
* Fix rte opcode, by Magnus Damm.ths2007-09-291-1/+1
* find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths2007-09-161-1/+1
* Fix tb->size mishandling, by Daniel Jacobowitz.ths2007-09-111-1/+0
* SH4 mov.b fix, by Vince Weaver.ths2007-08-261-4/+4
* Ignore PR flag in FPSCR when performing fmov, by Magnus Damm.ths2007-06-221-38/+7
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