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* Kill off cpu_state_reset()Andreas Färber2012-06-041-5/+0
* target-sh4: Let cpu_sh4_init() return SuperHCPUAndreas Färber2012-06-041-2/+2
* target-sh4: Start QOM'ifying CPU initAndreas Färber2012-04-301-2/+0
* target-sh4: QOM'ify CPU resetAndreas Färber2012-04-301-20/+2
* target-sh4: QOM'ify CPUAndreas Färber2012-04-301-1/+3
* target-sh4: Don't overuse CPUStateAndreas Färber2012-03-141-23/+23
* Rename cpu_reset() to cpu_state_reset()Andreas Färber2012-03-141-2/+2
* target-sh4: Clean includesStefan Weil2012-02-281-6/+0
* target-sh4: ignore ocbp and ocbwb instructionsAurelien Jarno2012-01-101-11/+3
* target-sh4: Fix operands for fipr, ftrv instructionsStefan Weil2012-01-071-3/+3
* Use glib memory allocation and free functionsAnthony Liguori2011-08-201-1/+1
* Remove exec-all.h include directivesBlue Swirl2011-06-261-1/+0
* Remove unused function parameters from gen_pc_load and rename the functionStefan Weil2011-04-201-2/+1
* Fix conversions from pointer to tcg_target_longStefan Weil2011-04-101-1/+1
* target-sh4: fix negcAurelien Jarno2011-02-041-2/+2
* target-sh4: implement negc using TCGAurelien Jarno2011-01-161-1/+15
* target-sh4: use rotl/rotr when possibleAurelien Jarno2011-01-161-5/+3
* target-sh4: use setcond when possibleAurelien Jarno2011-01-141-29/+27
* target-sh4: log instructions start in TCG codeAurelien Jarno2011-01-141-0/+4
* target-sh4: simplify comparisons after a 'and' opAurelien Jarno2011-01-141-3/+3
* target-sh4: fix reset on r2dAurelien Jarno2011-01-141-12/+8
* target-sh4: optimize exceptionsAurelien Jarno2011-01-141-5/+0
* target-sh4: add ftrv instructionAurelien Jarno2011-01-141-0/+11
* target-sh4: add fipr instructionAurelien Jarno2011-01-141-0/+12
* target-sh4: implement flush-to-zeroAurelien Jarno2011-01-141-0/+1
* target-sh4: define FPSCR constantsAurelien Jarno2011-01-141-2/+2
* target-sh4: use default-NaN modeAurelien Jarno2011-01-141-0/+1
* target-sh4: fix fpu disabled/illegal exceptionAurelien Jarno2011-01-111-10/+18
* target-xxx: Use fprintf_function (format checking)Stefan Weil2010-10-301-1/+1
* target-sh4: Add support for ldc & stc with sgrAlexandre Courbot2010-07-121-0/+2
* target-sh4: Split the LDST macro into 2 sub-macrosAlexandre Courbot2010-07-121-2/+6
* target-sh4: Remove duplicate CPU log.Richard Henderson2010-05-051-6/+0
* remove TARGET_* defines from translate-all.cPaolo Bonzini2010-04-081-0/+2
* target-sh4: MMU: fix mem_idx computationAurelien Jarno2010-02-091-1/+1
* target-sh4: minor optimisationsAurelien Jarno2010-02-081-26/+26
* Fix sys-queue.h conflict for goodBlue Swirl2009-09-121-2/+2
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
* Include assert.h from qemu-common.hPaul Brook2009-05-131-1/+0
* qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori2009-04-241-0/+1
* Add new command line option -singlestep for tcg single stepping.aurel322009-04-051-3/+2
* SH: Improve movca.l/ocbi emulation.edgar_igl2009-04-011-4/+42
* SH: Implement MOVCO.L and MOVLI.Laurel322009-03-021-1/+34
* SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an...aurel322009-02-071-0/+2
* targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori2009-02-051-2/+0
* Log reset events (Jan Kiszka)aliguori2009-01-261-0/+5
* global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori2009-01-151-1/+1
* Convert references to logfile/loglevel to use qemu_log*() macrosaliguori2009-01-151-10/+7
* sh4: Add FMAC instruction supportaurel322009-01-141-0/+11
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
* tcg_temp_local_new should take no parameteraurel322009-01-011-6/+6
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