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path: root/target-sh4/op_helper.c
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* target-sh4: split out Q and M from of SR and optimize div1Aurelien Jarno2015-06-121-118/+0
* target-sh4: Split out T from SRAurelien Jarno2015-06-121-25/+7
* target-sh4: use bit number for SR constantsAurelien Jarno2015-06-121-13/+13
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-1/+1
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-14/+0
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-1/+1
* exec: Change cpu_abort() argument to CPUStateAndreas Färber2014-03-131-1/+3
* translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber2014-03-131-5/+2
* cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber2014-03-131-2/+2
* exec: Change tlb_fill() argument to CPUStateAndreas Färber2014-03-131-3/+5
* cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-1/+3
* cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber2014-03-131-1/+2
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-121-1/+3
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-5/+5
* exec: refactor cpu_restore_stateBlue Swirl2012-12-161-17/+6
* target-sh4: rework exceptions handlingAurelien Jarno2012-09-211-17/+13
* target-sh4: implement addv and subv using TCGAurelien Jarno2012-09-211-58/+0
* target-sh4: implement addc and subc using TCGAurelien Jarno2012-09-211-32/+0
* target-sh4: use float32_muladd() to implement fmacAurelien Jarno2012-09-211-2/+1
* target-sh4: switch to AREG0 free modeBlue Swirl2012-09-151-93/+89
* Use uintptr_t for various op related functionsBlue Swirl2012-04-141-8/+6
* target-sh4: Don't overuse CPUStateAndreas Färber2012-03-141-2/+2
* softmmu_header: pass CPUState to tlb_fillBlue Swirl2011-10-011-4/+3
* Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl2011-08-071-1/+1
* exec.h cleanupBlue Swirl2011-07-301-1/+3
* cpu_loop_exit: avoid using AREG0Blue Swirl2011-06-261-5/+5
* Remove unused function parameter from cpu_restore_stateStefan Weil2011-04-201-1/+1
* target-sh4: get rid of CPU_{Float,Double}UAurelien Jarno2011-04-121-134/+68
* target-sh4: move intr_at_halt out of cpu_halted()Aurelien Jarno2011-03-031-0/+1
* target-sh4: implement negc using TCGAurelien Jarno2011-01-161-15/+0
* target-sh4: optimize exceptionsAurelien Jarno2011-01-141-10/+12
* target-sh4: add ftrv instructionAurelien Jarno2011-01-141-0/+26
* target-sh4: add fipr instructionAurelien Jarno2011-01-141-0/+20
* target-sh4: implement FPU exceptionsAurelien Jarno2011-01-141-22/+136
* target-sh4: implement flush-to-zeroAurelien Jarno2011-01-141-0/+1
* target-sh4: define FPSCR constantsAurelien Jarno2011-01-141-3/+4
* Replace assert(0) with abort() or cpu_abort()Blue Swirl2010-03-181-1/+1
* Fix Sparse warnings about using plain integer as NULL pointerBlue Swirl2009-09-211-2/+2
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
* SH: Improve movca.l/ocbi emulation.edgar_igl2009-04-011-0/+52
* sh4: Add FMAC instruction supportaurel322009-01-141-0/+11
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
* SH4: Implement FD bitaurel322008-12-071-0/+12
* target-sh4: use CPU_Float/CPU_Double instead of ugly castsaurel322008-11-191-40/+102
* TCG variable type checking.pbrook2008-11-171-0/+1
* SH4: sleep instruction bug fixaurel322008-09-151-1/+2
* SH4: final conversion to TCGaurel322008-09-011-0/+6
* SH4: convert floating-point ops to TCGaurel322008-09-011-0/+148
* SH4: Convert remaining non-fp ops to TCGaurel322008-09-011-43/+20
* SH4: convert control/status register load/store to TCGaurel322008-08-301-0/+9
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