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* PowerPC 601 need specific callbacks for its BATs setup.j_mayer2007-11-048-35/+136
| | | | | | | | | Implement PowerPC 601 HID0 register, needed for little-endian mode support. As a consequence, we need to merge hflags coming from MSR with other ones. Use little-endian mode from hflags instead of MSR during code translation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3524 c046a42c-6fe2-441c-8c8c-71466251a162
* Improve PowerPC CPU state dump.j_mayer2007-11-041-23/+25
| | | | | | | Dump NIP on SPR access faults. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3522 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix PowerPC high BATs access: BAT number was incorrect.j_mayer2007-11-031-3/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3519 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC MMU and exception fixes:j_mayer2007-11-035-55/+114
| | | | | | | | | | | | | * PowerPC 601 (and probably POWER/POWER2) uses a different BAT format than later PowerPC implementation. * Bugfix in BATs check: must not stop after 4 BATs when more are provided. * Enable POWER 'rac' instruction. * Fix exception prefix for all supported PowerPC implementations. * Fix exceptions, MMU model and bus model for PowerPC 601 & 620. * Enable PowerPC 620 as it could mostly boot a PreP target. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3518 c046a42c-6fe2-441c-8c8c-71466251a162
* Don't print any message when a priviledge exception occurs on mfpvrj_mayer2007-11-021-4/+10
| | | | | | | as the Linux allows applications to read this register. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3510 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix PowerPC program exception that was broken by FPU exception patchesj_mayer2007-11-021-5/+4
| | | | | | | (bug reported by Jason Wessel) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3509 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix CR ops with complement, thanks to Julian Seward for testingj_mayer2007-10-313-24/+27
| | | | | | | | | | and reporting the bug : * remove bugged CR ops specific micro-ops * use standard and / or / shift operations instead * comment not-used-anymore op_store_T1_crf_crf micro-op template. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3501 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix two PowerPC FPU emulation bugs (thanks to Aurelien Jarno)j_mayer2007-10-291-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3487 c046a42c-6fe2-441c-8c8c-71466251a162
* Adjust s390 addresses (the MSB is defined as "to be ignored").ths2007-10-291-1/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
* Make Alpha and PowerPC targets use shared helpersj_mayer2007-10-283-89/+25
| | | | | | | for clz, clo, ctz, cto and ctpop. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3466 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC coding style and inlining fixes.j_mayer2007-10-283-42/+46
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3461 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC floating-point helper typo.j_mayer2007-10-271-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3460 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC float bugfix: 64 bits float mantissa is 52 bits long.j_mayer2007-10-271-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3459 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix PowerPC FPSCR update and floating-point exception generationj_mayer2007-10-277-336/+1120
| | | | | | | in most useful cases. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3458 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix endianness bug for PowerPC stfiwx instruction.j_mayer2007-10-271-2/+11
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3456 c046a42c-6fe2-441c-8c8c-71466251a162
* For consistency, align the address to the cache line before using it,j_mayer2007-10-261-2/+2
| | | | | | | when invalidating the instruction cache. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3449 c046a42c-6fe2-441c-8c8c-71466251a162
* Bugfix in PowerPC dcbi instruction:j_mayer2007-10-261-5/+2
| | | | | | | | we must do a load before the store, or we'll store random data. Update cache instructions comments. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3448 c046a42c-6fe2-441c-8c8c-71466251a162
* Pretty dump for specific PowerPC instructions names.j_mayer2007-10-261-35/+75
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3447 c046a42c-6fe2-441c-8c8c-71466251a162
* Make PowerPC hypervisor resources able to compile, even if not enabled for now.j_mayer2007-10-261-6/+18
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3446 c046a42c-6fe2-441c-8c8c-71466251a162
* Bugfix: PowerPC 64 slbia never invalidates the first segment entry.j_mayer2007-10-261-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3445 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix PowerPC 64x64 bits multiplication overflow check.j_mayer2007-10-251-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3444 c046a42c-6fe2-441c-8c8c-71466251a162
* Use host-utils for PowerPC 64 64x64 bits multiplications.j_mayer2007-10-253-78/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3442 c046a42c-6fe2-441c-8c8c-71466251a162
* Add PowerPC power-management state check callback.j_mayer2007-10-251-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3441 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement power-management for all defined PowerPC CPUs.j_mayer2007-10-252-30/+174
| | | | | | | Fix PowerPC 970MP definition. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3440 c046a42c-6fe2-441c-8c8c-71466251a162
* Update PowerPC emulation status file.j_mayer2007-10-251-20/+39
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3438 c046a42c-6fe2-441c-8c8c-71466251a162
* Allow selection of all defined PowerPC 74xx (aka G4) CPUs.j_mayer2007-10-251-36/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3437 c046a42c-6fe2-441c-8c8c-71466251a162
* Gprof prooved the PowerPC emulation spent too much time in MSR load and storej_mayer2007-10-258-461/+398
| | | | | | | | | | | | routines. Coming back to a raw MSR storage model then speed-up the emulation. Improve fast MSR updates (wrtee wrteei and mtriee cases). Share rfi family instructions helpers code to avoid bug in duplicated code. Allow entering halt mode as the result of a rfi instruction. Add a new helper_regs.h file to avoid duplication of special registers manipulation routines (currently XER and MSR). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3436 c046a42c-6fe2-441c-8c8c-71466251a162
* Properly implement non-execute bit on PowerPC segments and PTEs.j_mayer2007-10-142-127/+139
| | | | | | | Fix page protection bits for PowerPC 64 MMU. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3395 c046a42c-6fe2-441c-8c8c-71466251a162
* Merge PowerPC 620 input bus definitions with standard PowerPC 6xx.j_mayer2007-10-141-26/+19
| | | | | | | Avoid hardcoding PowerPC interrupts definitions to ease updates. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3393 c046a42c-6fe2-441c-8c8c-71466251a162
* There is no need of a specific MMU model for PowerPC 601.j_mayer2007-10-143-27/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3392 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement PowerPC 64 SLB invalidation helpers.j_mayer2007-10-141-19/+63
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3391 c046a42c-6fe2-441c-8c8c-71466251a162
* Do not allow PowerPC CPU restart after entering checkstop mode.j_mayer2007-10-141-5/+12
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3388 c046a42c-6fe2-441c-8c8c-71466251a162
* Generate micro-ops for PowerPC hypervisor mode.j_mayer2007-10-142-0/+10
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3386 c046a42c-6fe2-441c-8c8c-71466251a162
* Replace is_user variable with mmu_idx in softmmu core,j_mayer2007-10-145-15/+32
| | | | | | | | | | | | | | allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
* Unify '-cpu ?' option.j_mayer2007-10-121-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
* Update PowerPC emulation status file.j_mayer2007-10-081-15/+45
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3355 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove synonymous in PowerPC MSR bits definitions.j_mayer2007-10-083-72/+193
| | | | | | | | | | Fix MSR EP bit buggy definition. Remove unuseful MSR flags. Fix MSR bits and flags definitions for most supported PowerPC implementations. Add MSR definitions/flags constistency checks and optional dump. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3354 c046a42c-6fe2-441c-8c8c-71466251a162
* Real-mode only PowerPC 40x do not have any TLBs.j_mayer2007-10-082-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3353 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement exception prefix feature for PowerPC 601.j_mayer2007-10-082-7/+8
| | | | | | | Fix PowerPC 601 hardware reset vector. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3352 c046a42c-6fe2-441c-8c8c-71466251a162
* Add missing exception vectors for PowerPC 7x5.j_mayer2007-10-081-1/+27
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3351 c046a42c-6fe2-441c-8c8c-71466251a162
* Work-around C89 and/or "old" gcc unspecified behavior (#if in macro calls).j_mayer2007-10-072-28/+16
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3350 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy.j_mayer2007-10-075-8/+274
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3349 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC target coding style fixes.j_mayer2007-10-075-27/+20
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3348 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC target optimisations: make intensive use of always_inline.j_mayer2007-10-077-236/+255
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3347 c046a42c-6fe2-441c-8c8c-71466251a162
* Reorganize the CPUPPCState structure to group features.j_mayer2007-10-073-19/+69
| | | | | | | | | | Add #ifdef to avoid compiling not relevant resources: - MMU related stuff for user-mode only targets - PowerPC 64 only resources for PowerPC 32 targets - embedded PowerPC extensions for non-ppcemb targets. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3343 c046a42c-6fe2-441c-8c8c-71466251a162
* Add MSR bits signification per PowerPC implementation flags (to be continued).j_mayer2007-10-074-61/+122
| | | | | | | | As a side effect, single step and branch step are available again. Remove irrelevant MSR bits definitions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
* Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer2007-10-055-119/+373
| | | | | | | | | | | | memory segments. Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead. Make SLB area size implementation dependant. Improve TLB & SLB search debug traces. Temporary hack to make PowerPC 970 boot from ROM instead of RAM. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3335 c046a42c-6fe2-441c-8c8c-71466251a162
* Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific.j_mayer2007-10-052-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3333 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC hardware reset vector is now considered as part of the exception model.j_mayer2007-10-052-137/+31
| | | | | | | Use it at CPU initialisation time. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3332 c046a42c-6fe2-441c-8c8c-71466251a162
* More cache tuning fixes:j_mayer2007-10-042-3/+23
| | | | | | | | * fix the tunable cache line size probe for PowerPC 970. * initialize HID5 so cache line is 32 bytes long when running in user-mode only git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3322 c046a42c-6fe2-441c-8c8c-71466251a162
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