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* moved halted field to CPU_COMMONbellard2008-05-281-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix off-by-one unwinding error.pbrook2008-05-251-5/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix broken PPC user space single steppingaurel322008-05-101-23/+39
| | | | | | | (Jason Wessel) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4421 c046a42c-6fe2-441c-8c8c-71466251a162
* PPC: fix efstst* instructionsaurel322008-05-061-6/+6
| | | | | | | (Tristan Gingold) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4362 c046a42c-6fe2-441c-8c8c-71466251a162
* PPC: fix definition of msr_speaurel322008-05-061-1/+1
| | | | | | | (Tristan Gingold) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4361 c046a42c-6fe2-441c-8c8c-71466251a162
* PPC: fix isel opcode decodingaurel322008-05-051-1/+1
| | | | | | | (Tristan Gingold) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4345 c046a42c-6fe2-441c-8c8c-71466251a162
* remove target ifdefs from vl.caurel322008-05-041-0/+20
| | | | | | | (Glauber Costa) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
* Factorize code in translate.caurel322008-04-281-0/+42
| | | | | | | (Glauber Costa) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove osdep.c/qemu-img code duplicationaurel322008-04-112-0/+2
| | | | | | | (Kevin Wolf) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
* Revert revisions r4168 and r4169. That's work in progress, not ready for ↵aurel322008-04-074-21/+25
| | | | | | trunk yet. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4171 c046a42c-6fe2-441c-8c8c-71466251a162
* Always enable precise emulation when softfloat is usedaurel322008-04-074-25/+21
| | | | | | | | | | | | The patch below changes the way to enable softfloat on the PPC target. It is now enabled when softfloat is used. The rationale behind this change is that persons who want precise emulation prefer precision over emulation speed. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4168 c046a42c-6fe2-441c-8c8c-71466251a162
* Math functions helper for CONFIG_SOFTFLOAT=yesaurel322008-03-131-0/+21
| | | | | | | | The patch below adds isfinite() and isnormal() functions which can work with float64 type, used when CONFIG_SOFTFLOAT=yes. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4048 c046a42c-6fe2-441c-8c8c-71466251a162
* Use float32/64 instead of float/doubleaurel322008-03-135-458/+236
| | | | | | | | | | | | | | The patch below uses the float32 and float64 types instead of the float and double types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat. It also defines a new union CPU_FloatU in addition to CPU_DoubleU, and use them instead of identical unions that are defined in numerous places. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4047 c046a42c-6fe2-441c-8c8c-71466251a162
* mtfsf: fix FPSCR_VX and FPSCR_FEX computationaurel322008-03-101-0/+4
| | | | | | | | | | | | The patch below fixes the computation of FPSCR_VX and FPSCR_FEX when using the mtfsf instruction. As stated in the PowerPC manual the mtfsf instruction can't alter those bit, and thus it should always be computed. Acked by Jocelyn Mayer. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4034 c046a42c-6fe2-441c-8c8c-71466251a162
* use the TCG code generatorbellard2008-02-012-55/+8
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
* Cleanup: remove useless TARGET_GPR_BITS definition.j_mayer2007-12-101-3/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3799 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix PowerPC 74xx definitions.j_mayer2007-12-102-49/+228
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3798 c046a42c-6fe2-441c-8c8c-71466251a162
* Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths2007-12-091-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix incorrect debug prints (reported by Paul Brook).j_mayer2007-11-245-102/+96
| | | | | | | Remove obsolete / duplicated debug prints and improve output consistency. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3725 c046a42c-6fe2-441c-8c8c-71466251a162
* Revert foolish patch.j_mayer2007-11-233-12/+8
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3724 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix ppc32 register dumps on 64-bit hosts.pbrook2007-11-233-8/+12
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3723 c046a42c-6fe2-441c-8c8c-71466251a162
* Add new sane low-level memory accessors for PowerPC that do properj_mayer2007-11-225-524/+443
| | | | | | | | | size or zero extension, with homogenous names. Fix load & store strings: those are now endian-sensitive, by definition. Fix dcbz: must always align the target address to a cache line boundary. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3719 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix PowerPC 7xx definitions.j_mayer2007-11-212-133/+630
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3713 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove shared macro used to define PowerPC implementations instructions sets:j_mayer2007-11-192-174/+489
| | | | | | | | | tend more to propagate bugged definition than simplify the code. Check and fix PowerPC 6xx implementations definitions. Misc fixes in PowerPC CPU list. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3707 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC 620 MMU do not have the same exact behavior as standardj_mayer2007-11-193-24/+53
| | | | | | | 64 bits PowerPC ones. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3706 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC instruction fixes:j_mayer2007-11-192-9/+9
| | | | | | | | - hrfid is part of the hypervisor extension - fix stfiwx naming git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3705 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix another collision in PowerPC instructions definitions.j_mayer2007-11-191-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3702 c046a42c-6fe2-441c-8c8c-71466251a162
* New PowerPC CPU flag to define the decrementer and time-base source clock.j_mayer2007-11-192-51/+83
| | | | | | | Use it to properly initialize the clock for the PreP target. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3701 c046a42c-6fe2-441c-8c8c-71466251a162
* Improve PowerPC instructions set dump.j_mayer2007-11-172-7/+44
| | | | | | | | Remove meaningless define from cpu.h Misc cleanups. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3682 c046a42c-6fe2-441c-8c8c-71466251a162
* Add definitions for Freescale PowerPC implementations,j_mayer2007-11-172-1646/+3290
| | | | | | | | | ie MPC5xx, MPC8xx, e200, e300, e500 and e600 cores. Make those CPUs and PowerPC 440 available for user-mode emulation, thus providing a way of testing their implementation specific instructions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3681 c046a42c-6fe2-441c-8c8c-71466251a162
* Define Freescale cores specific MMU model, exceptions and input bus.j_mayer2007-11-173-36/+109
| | | | | | | (but do not provide any actual implementation). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3680 c046a42c-6fe2-441c-8c8c-71466251a162
* A little more granularity in PowerPC instructions definition is neededj_mayer2007-11-172-66/+84
| | | | | | | | in order to implement Freescale cores. Fix efsadd / efssub opcodes. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3679 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC hypervisor mode is not fundamentally available only for PowerPC 64.j_mayer2007-11-174-108/+73
| | | | | | | | Remove TARGET_PPC64 dependency and add code provision to be able to define a fake 32 bits CPU with hypervisor feature support. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3678 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix collision in PowerPC instructions definitions.j_mayer2007-11-171-11/+11
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3668 c046a42c-6fe2-441c-8c8c-71466251a162
* Make the PowerPC MMU model, exception model and input bus modelj_mayer2007-11-172-11/+12
| | | | | | | typedefed enums. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3660 c046a42c-6fe2-441c-8c8c-71466251a162
* Add missing definition for number of input pins for the PowerPC 970 bus.j_mayer2007-11-171-0/+1
| | | | | | | | Use proper INPUT_NB definitions to allocate PowerPC input pins structure, fixing a buffer overflow in the 6xx bus case. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3659 c046a42c-6fe2-441c-8c8c-71466251a162
* Always make all PowerPC exception definitions visible.j_mayer2007-11-174-51/+58
| | | | | | | | | Always make the hypervisor timers available. Remove all TARGET_PPC64H checks, keeping a few if (0) tests for cases that cannot be properly handled with the current PowerPC CPU definition. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3656 c046a42c-6fe2-441c-8c8c-71466251a162
* Always make PowerPC hypervisor mode memory accesses and instructionsj_mayer2007-11-165-1033/+254
| | | | | | | | | | available for full system emulation, then removing all #if TARGET_PPC64H from micro-ops and code translator. Add new macros to dramatically simplify memory access tables definitions in target-ppc/translate.c. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3654 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix PowerPC targets compilation on 32 bits hosts:j_mayer2007-11-142-5/+5
| | | | | | | | now that the SPE extension is available for all targets, we always need to have some 64 bits temporary registers. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3647 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix invalid PowerPC 64 rldimi optimized case.j_mayer2007-11-141-5/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3638 c046a42c-6fe2-441c-8c8c-71466251a162
* Reorganize PowerPC instructions categories, add icbi separate case.j_mayer2007-11-142-95/+109
| | | | | | | Fix frsqrtes instruction opcode. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3636 c046a42c-6fe2-441c-8c8c-71466251a162
* Add PVR and SPR definition for most embedded PowerPC from Freescale.j_mayer2007-11-121-59/+309
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3632 c046a42c-6fe2-441c-8c8c-71466251a162
* PowerPC SPE extension fix: must always preserve GPR high bits whenj_mayer2007-11-123-6/+6
| | | | | | | running in 32 bits mode. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3631 c046a42c-6fe2-441c-8c8c-71466251a162
* Allow use of SPE extension by all PowerPC targets,j_mayer2007-11-128-81/+148
| | | | | | | | | | adding gprh registers to store GPR MSBs when GPRs are 32 bits. Remove not-needed-anymore ppcemb-linux-user target. Keep ppcemb-softmmu target, which provides 1kB pages support and 36 bits physical address space. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3628 c046a42c-6fe2-441c-8c8c-71466251a162
* More PowerPC target -1 usage fixes (reservation address).j_mayer2007-11-122-9/+9
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3627 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix usage of the -1 constant in the PowerPC target code:j_mayer2007-11-124-51/+54
| | | | | | | fix invalid size casts and/or sign-extensions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3626 c046a42c-6fe2-441c-8c8c-71466251a162
* fixed invalid typebellard2007-11-111-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3582 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix POWER abs & abso computation.j_mayer2007-11-112-8/+10
| | | | | | | Fix PowerPC SPE evabs & evneg (thanks to Fabrice Bellard for reporting the bug) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3575 c046a42c-6fe2-441c-8c8c-71466251a162
* Optimize PowerPC overflow flag computation in most useful cases.j_mayer2007-11-114-115/+57
| | | | | | | | | Use the same routines to check overflow for addo, subfo and PowerPC 405 multiply and add cases. Fix carry reset in addme(o) and subfme(o) cases. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3574 c046a42c-6fe2-441c-8c8c-71466251a162
* Allow selection of PowerPC CPU giving a PVR.j_mayer2007-11-102-372/+420
| | | | | | | Remove unused pvr_mask field from CPU definition. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3571 c046a42c-6fe2-441c-8c8c-71466251a162
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