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* target-ppc: move sdr1 value change detection logic to helper_store_sdr1()Mark Cave-Ayland2015-03-092-21/+21
* display cpu id dump stateTristan Gingold2015-03-091-2/+3
* target-ppc: Use right page size with hash table lookupAneesh Kumar K.V2015-03-093-11/+30
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-6/+3
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+1
* exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell2015-01-201-2/+0
* kvm: extend kvm_irqchip_add_msi_route to work on s390Frank Blaschka2015-01-121-0/+6
* Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int...Peter Maydell2015-01-107-110/+323
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| * target-ppc: Mark SR() and gen_sync_exception() as !CONFIG_USER_ONLYPeter Maydell2015-01-071-0/+5
| * target-ppc: Introduce Privileged TM NoopsTom Musta2015-01-071-0/+38
| * target-ppc: Introduce tcheckTom Musta2015-01-071-0/+17
| * target-ppc: Introduce TM NoopsTom Musta2015-01-071-0/+38
| * target-ppc: Introduce tbeginTom Musta2015-01-073-0/+36
| * target-ppc: Introduce TEXASRU Bit FieldsTom Musta2015-01-071-0/+20
| * target-ppc: Power8 Supports Transactional MemoryTom Musta2015-01-071-2/+3
| * target-ppc: Introduce tm_enabled Bit to CPU StateTom Musta2015-01-071-0/+8
| * target-ppc: Introduce Feature Flag for Transactional MemoryTom Musta2015-01-071-0/+2
| * target-ppc: Introduce Instruction Type for Transactional MemoryTom Musta2015-01-071-1/+3
| * target-ppc: explicitly save page table headers in big endianCédric Le Goater2015-01-071-3/+17
| * target-ppc: Eliminate set_fprf Argument From helper_compute_fprfTom Musta2015-01-073-38/+28
| * target-ppc: Eliminate set_fprf Argument From gen_compute_fprfTom Musta2015-01-071-15/+23
| * target-ppc: Fully Migrate to gen_set_cr1_from_fpscrTom Musta2015-01-071-22/+33
| * target-ppc: mffs. Should Set CR1 from FPSCR BitsTom Musta2015-01-071-1/+3
| * target-ppc: Fix Floating Point Move Instructions That Set CR1Tom Musta2015-01-071-20/+30
| * target-ppc: VXSQRT Should Not Be Set for NaNsTom Musta2015-01-071-12/+17
| * target-ppc: Load/Store Vector Element Storage AlignmentTom Musta2015-01-071-8/+14
* | gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
* | translate: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-12/+12
* | target-ppc: pass DisasContext to SPR generator functionsPaolo Bonzini2014-12-233-137/+133
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* qemu-log: add log category for MMU infoAntony Pavlov2014-12-163-29/+33
* target-ppc: Altivec's mtvscr Decodes Wrong RegisterTom Musta2014-11-201-1/+1
* target-ppc: Fix breakpoint registers for e300Fabien Chouteau2014-11-201-26/+26
* target-ppc: Fix Altivec Round OpcodesTom Musta2014-11-041-6/+6
* target-ppc: Fix vcmpbfp. Unordered CaseTom Musta2014-11-041-1/+1
* target-ppc: Fix Altivec ShiftsTom Musta2014-11-041-11/+2
* target-ppc: simplify AES emulationAurelien Jarno2014-11-041-2/+2
* ppc: do not look at the MMU index to detect PR/HV modePaolo Bonzini2014-11-041-88/+77
* target-ppc: kvm: Fix memory overflow issue about strncat()Chen Gang2014-11-041-4/+4
* target-ppc: Fix an invalid free in opcode table handling code.Bharata B Rao2014-11-041-3/+16
* target-ppc: Use macros in opcodes table handling codeBharata B Rao2014-11-042-11/+16
* target-ppc : Add new processor type 440x5wDFPUPierre Mallard2014-11-042-0/+41
* target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64Pierre Mallard2014-11-045-22/+16
* target-ppc: Implement IVOR[59] By Default for Book ETom Musta2014-11-041-1/+1
* target-ppc: Fix kvmppc_set_compat to use negotiated cpu-versionAlexey Kardashevskiy2014-11-041-1/+1
* ppc: compute mask from BI using right shiftPaolo Bonzini2014-11-041-3/+3
* ppc: rename gen_set_cr6_from_fpscrPaolo Bonzini2014-11-041-7/+7
* ppc: fix result of DLMZB when no zero bytes are foundPaolo Bonzini2014-11-041-0/+1
* ppc: use CRF_* in int_helper.cPaolo Bonzini2014-11-041-6/+6
* qdev: Drop legacy_name from qdev propertiesGonglei2014-10-151-1/+0
* qdev: Add description field in PropertyInfo structGonglei2014-10-151-0/+1
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