summaryrefslogtreecommitdiffstats
path: root/target-ppc
Commit message (Collapse)AuthorAgeFilesLines
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-124-4/+10
| | | | | | | | | | This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Pass CPUState to cpu_interrupt()Andreas Färber2013-03-121-1/+1
| | | | | | | | Move it to qom/cpu.h to avoid issues with include order. Change pc_acpi_smi_interrupt() opaque to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-125-21/+36
| | | | | | | | | | Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-ppc: Move CPU aliases out of translate_init.cAndreas Färber2013-03-083-198/+211
| | | | | | | | | | Move array of CPU aliases to cpu-models.c, alongside model definitions. This requires to zero-terminate the aliases array since ARRAY_SIZE() can no longer be used in translate_init.c then. Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Report CPU aliases for QMPAndreas Färber2013-03-081-0/+21
| | | | | | | | | | The QMP query-cpu-definitions implementation iterated over CPU classes only, which were getting less and less as aliases were extracted. Keep them in QMP as valid -cpu arguments even if not guaranteed stable. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: List alias names alongside CPU modelsAndreas Färber2013-03-081-12/+11
| | | | | | | | | Revert adding a separate -cpu ? output section for aliases and list them per CPU subclass. Requested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Make host CPU a subclass of the host's CPU modelAndreas Färber2013-03-082-50/+31
| | | | | | | | | | | | | | This avoids assigning individual class fields and contributors forgetting to add field assignments in KVM-only code. ppc_cpu_class_find_by_pvr() requires the CPU model classes to be registered, so defer host CPU type registration to kvm_arch_init(). Only register the host CPU type if there is a class with matching PVR. This lets us drop error handling from instance_init. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Fix PPC_DUMP_SPR_ACCESS buildAndreas Färber2013-03-081-2/+2
| | | | | | | | A victim of the d523dd00a7d73b28f2e99acf45a4b3f92e56e40a AREG0 conversion, insert the missing cpu_env arguments. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Synchronize FPU state with KVMDavid Gibson2013-03-081-0/+130
| | | | | | | | | | | | Currently qemu does not get and put the state of the floating point and vector registers to KVM. This is obviously a problem for savevm, as well as possibly being problematic for debugging of FP-using guests. This patch fixes this by using new extensions to the ONE_REG interface to synchronize the qemu floating point state with KVM. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Add mechanism for synchronizing SPRs with KVMDavid Gibson2013-03-083-57/+178
| | | | | | | | | | | | | | | | | | | | Currently when runing under KVM on ppc, we synchronize a certain number of vital SPRs to KVM through the SET_SREGS call. This leaves out quite a lot of important SPRs which are maintained in KVM. It would be helpful to have their contents in qemu for debugging purposes, and when we implement migration it will be vital, since they include important guest state that will need to be restored on the target. This patch sets up for synchronization of any registers supported by the KVM ONE_REG calls. A new variant on spr_register() allows a ONE_REG id to be stored with the SPR information. When we set/get information to KVM we also synchronize any SPRs so registered. For now we set this mechanism up to synchronize a handful of important registers that already have ONE_REG IDs, notably the DAR and DSISR. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Change "POWER7" CPU aliasAndreas Färber2013-03-081-1/+1
| | | | | | | | Let it resolve to v2.3 rather than v2.0. Suggested-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Fix remaining microcontroller typos among modelsAndreas Färber2013-03-081-6/+6
| | | | | | | controler -> controller Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Split model definitions out of translate_init.cAndreas Färber2013-03-084-1905/+1955
| | | | | | | | | | | Now that model definitions only reference their parent type, model definitions are independent of the family definitions and can be compiled independently of TCG translation. Keep all #if defined(TODO) code local to cpu-models.c. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Update Coding Style for CPU modelsAndreas Färber2013-03-081-100/+100
| | | | | | | Drop the space in #if defined (TODO). Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Turn descriptive CPU model comments into device descriptionsAndreas Färber2013-03-081-860/+754
| | | | | | | Fix microcontroller typo while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Turn descriptive CPU family comments into device descriptionsAndreas Färber2013-03-081-52/+107
| | | | | | | | | | | This gets rid of some more overly long comments that have lost most of their purpose now that in most cases there's only two functions left per CPU family. The class field is inherited by the actual CPU models, so override it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Set remaining fields on CPU family classesAndreas Färber2013-03-081-430/+375
| | | | | | | Now POWERPC_DEF_SVR() no longer sets family-specific fields itself. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Register all types for TARGET_PPCEMBAndreas Färber2013-03-081-9/+34
| | | | | | | | | | | | | | | Don't attempt to suppress registration of CPU types, since the criteria is actually a property of the class and should thus become a field. Since we can't check a field set in a class_init function before registering the type that leads to execution of that function, guard the -cpu class lookup instead and suppress exposing these classes in -cpu ? and in QMP. In case someone tries to hot-add an incompatible CPU via device_add, error out in realize. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Set instruction flags on CPU family classesAndreas Färber2013-03-081-495/+499
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Introduce abstract CPU family typesAndreas Färber2013-03-081-69/+432
| | | | | | | | | | Instead of assigning *_<family> constants, set .parent to a family type. Introduce a POWERPC_FAMILY() macro to keep type registration close to its implementation. This macro will need tweaking later. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Convert CPU definitionsAndreas Färber2013-03-084-117/+115
| | | | | | | | | | | | | | | | Turn the array of model definitions into a set of self-registering QOM types with their own class_init. Unique identifiers are obtained from the combination of PVR, SVR and family identifiers; this requires all alias #defines to be removed from the list. Possibly there are some more left after this commit that are not currently being compiled. Prepares for introducing abstract intermediate CPU types for families. Keep the right-aligned macro line breaks within 78 chars to aid three-way merges. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Get model name from type nameAndreas Färber2013-03-081-3/+10
| | | | | | | We are about to drop the redundant name field along with ppc_def_t. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract POWER7 aliasAndreas Färber2013-03-081-2/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 970 aliasesAndreas Färber2013-03-081-6/+2
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 405GPe aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract MPC8240 aliasAndreas Färber2013-03-081-5/+3
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract MPC5200/MPC5200B aliasesAndreas Färber2013-03-081-10/+2
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract MPC52xx aliasAndreas Färber2013-03-081-5/+2
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract MPC82xx_HiP{3, 4} aliasesAndreas Färber2013-03-081-42/+14
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract MPC82xx aliases to *_HiP4Andreas Färber2013-03-081-18/+6
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract MPC8247/MPC8248/MPC8270-80 aliasesAndreas Färber2013-03-081-21/+7
| | | | | | | This depends on the fix for "G2leGP3" PVR. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract MPC82xx aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract e200 aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract e300 aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract MPC83xx aliasesAndreas Färber2013-03-081-16/+4
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract e500v1/e500v2 aliasesAndreas Färber2013-03-081-6/+2
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract MPC85xx aliasesAndreas Färber2013-03-081-85/+17
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 604e aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 601/601v aliasesAndreas Färber2013-03-081-6/+2
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 603r aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 603e aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 740/750 aliasesAndreas Färber2013-03-081-5/+2
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 750 aliasesAndreas Färber2013-03-081-18/+6
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 7x5 aliasesAndreas Färber2013-03-081-5/+2
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 7400 aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 7410 aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 7448 aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 7450 aliasAndreas Färber2013-03-081-3/+1
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 74x1 aliasesAndreas Färber2013-03-081-5/+2
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Extract 74x5 as aliasesAndreas Färber2013-03-081-5/+2
| | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
OpenPOWER on IntegriCloud