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path:
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target-ppc
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translate_init.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
Fix powerpc 604 reset vector
Tristan Gingold
2009-04-28
1
-2
/
+2
*
Fix PPC reset
Blue Swirl
2009-04-28
1
-20
/
+23
*
target-ppc: fix commit r6789
aurel32
2009-03-10
1
-2
/
+2
*
target-ppc: free a tcg temp variable
aurel32
2009-03-09
1
-0
/
+1
*
target-ppc: add support for reading/writing spefscr
aurel32
2009-03-09
1
-8
/
+23
*
Fix off-by-one errors for Altivec and SPE registers
aurel32
2009-03-07
1
-8
/
+8
*
Keep SLB in-CPU
blueswir1
2009-03-07
1
-1
/
+1
*
Nop some SPRs on 970fx
blueswir1
2009-03-07
1
-0
/
+12
*
target-ppc: improve mfcr/mtcrf
aurel32
2009-03-03
1
-1
/
+0
*
kvm/powerpc: Add irq support for E500 core
aurel32
2009-03-02
1
-2
/
+3
*
Implement HIOR
blueswir1
2009-02-28
1
-8
/
+21
*
target-ppc: Model e500v{1,2} CPUs more accurately
aurel32
2009-02-09
1
-102
/
+125
*
target-ppc: Model SPE floating-point instructions more accurately
aurel32
2009-02-09
1
-9
/
+9
*
targets: remove error handling from qemu_malloc() callers (Avi Kivity)
aliguori
2009-02-05
1
-2
/
+0
*
Add calls to initialize VSCR on appropriate machines
aurel32
2009-02-03
1
-0
/
+22
*
target-ppc: Add SPE register read/write using XML
aurel32
2009-01-24
1
-0
/
+50
*
target-ppc: Add Altivec register read/write using XML
aurel32
2009-01-24
1
-0
/
+50
*
target-ppc: Add float register read/write using XML
aurel32
2009-01-24
1
-0
/
+32
*
target-ppc: Include gdbstub.h
aurel32
2009-01-24
1
-0
/
+1
*
Update FSF address in GPL/LGPL boilerplate
aurel32
2009-01-04
1
-1
/
+1
*
Use the ARRAY_SIZE() macro where appropriate.
malc
2008-12-22
1
-3
/
+3
*
target-ppc: rework exception code
aurel32
2008-12-11
1
-3
/
+3
*
target-ppc: convert SPR accesses to TCG
aurel32
2008-12-07
1
-132
/
+177
*
Attached patch fixes a series of this warning
blueswir1
2008-11-16
1
-1
/
+1
*
target-ppc: Convert XER accesses to TCG
aurel32
2008-10-21
1
-2
/
+2
*
Suppress gcc 4.x -Wpointer-sign (included in -Wall) warnings
blueswir1
2008-09-20
1
-9
/
+9
*
ppc: Convert ctr, lr moves to TCG
aurel32
2008-09-14
1
-4
/
+4
*
Fix some warnings that would be generated by gcc -Wredundant-decls
blueswir1
2008-08-30
1
-2
/
+0
*
Fix PowerPC 74xx definitions.
j_mayer
2007-12-10
1
-47
/
+225
*
Fix PowerPC 7xx definitions.
j_mayer
2007-11-21
1
-132
/
+612
*
Remove shared macro used to define PowerPC implementations instructions sets:
j_mayer
2007-11-19
1
-172
/
+480
*
PowerPC 620 MMU do not have the same exact behavior as standard
j_mayer
2007-11-19
1
-3
/
+6
*
New PowerPC CPU flag to define the decrementer and time-base source clock.
j_mayer
2007-11-19
1
-39
/
+67
*
Improve PowerPC instructions set dump.
j_mayer
2007-11-17
1
-6
/
+44
*
Add definitions for Freescale PowerPC implementations,
j_mayer
2007-11-17
1
-1259
/
+2850
*
Define Freescale cores specific MMU model, exceptions and input bus.
j_mayer
2007-11-17
1
-4
/
+13
*
A little more granularity in PowerPC instructions definition is needed
j_mayer
2007-11-17
1
-21
/
+25
*
Make the PowerPC MMU model, exception model and input bus model
j_mayer
2007-11-17
1
-4
/
+3
*
Always make all PowerPC exception definitions visible.
j_mayer
2007-11-17
1
-2
/
+0
*
Reorganize PowerPC instructions categories, add icbi separate case.
j_mayer
2007-11-14
1
-4
/
+6
*
Add PVR and SPR definition for most embedded PowerPC from Freescale.
j_mayer
2007-11-12
1
-59
/
+309
*
Allow selection of PowerPC CPU giving a PVR.
j_mayer
2007-11-10
1
-371
/
+420
*
added cpu_model parameter to cpu_init()
bellard
2007-11-10
1
-21
/
+11
*
PowerPC 601 need specific callbacks for its BATs setup.
j_mayer
2007-11-04
1
-1
/
+10
*
Fix PowerPC high BATs access: BAT number was incorrect.
j_mayer
2007-11-03
1
-3
/
+3
*
PowerPC MMU and exception fixes:
j_mayer
2007-11-03
1
-31
/
+31
*
Implement power-management for all defined PowerPC CPUs.
j_mayer
2007-10-25
1
-7
/
+172
*
Allow selection of all defined PowerPC 74xx (aka G4) CPUs.
j_mayer
2007-10-25
1
-36
/
+0
*
There is no need of a specific MMU model for PowerPC 601.
j_mayer
2007-10-14
1
-4
/
+1
*
Remove synonymous in PowerPC MSR bits definitions.
j_mayer
2007-10-08
1
-39
/
+171
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