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* target-ppc: Introduce DFP Shift SignificandTom Musta2014-06-161-0/+10
* target-ppc: Introduce DFP Insert Biased ExponentTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP Extract Biased ExponentTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP Encode BCD to DPDTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP Decode DPD to BCDTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP Convert to FixedTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP Convert to FixedTom Musta2014-06-161-0/+4
* target-ppc: Introduce Round to DFP Short/LongTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP Convert to Long/ExtendedTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP Round to IntegerTom Musta2014-06-161-0/+8
* target-ppc: Introduce DFP ReroundTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP QuantizeTom Musta2014-06-161-0/+8
* target-ppc: Introduce DFP Test SignificanceTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP Test ExponentTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP Test Data GroupTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP Test Data ClassTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP ComparesTom Musta2014-06-161-0/+8
* target-ppc: Introduce DFP DivideTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP MultiplyTom Musta2014-06-161-0/+4
* target-ppc: Introduce DFP SubtractTom Musta2014-06-161-1/+4
* target-ppc: Introduce DFP AddTom Musta2014-06-161-2/+5
* target-ppc: Introduce Decoder Macros for DFPTom Musta2014-06-161-0/+109
* target-ppc: Introduce Generator Macros for DFP Arithmetic FormsTom Musta2014-06-161-0/+177
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-0/+1
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-3/+2
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-2/+2
* target-ppc: Use Additional Temporary in stqcx CaseTom Musta2014-03-051-3/+5
* target-ppc/translate.c: Use ULL suffix for 64 bit constantsPeter Maydell2014-03-051-2/+2
* target-ppc: Altivec 2.07: Vector Permute and Exclusive ORTom Musta2014-03-051-1/+6
* target-ppc: Altivec 2.07: Vector SHA Sigma InstructionsTom Musta2014-03-051-0/+24
* target-ppc: Altivec 2.07: AES InstructionsTom Musta2014-03-051-0/+29
* target-ppc: Altivec 2.07: Binary Coded Decimal InstructionsTom Musta2014-03-051-4/+41
* target-ppc: Altivec 2.07: Vector Polynomial Multiply SumTom Musta2014-03-051-0/+8
* target-ppc: Altivec 2.07: Vector Gather Bits by BytesTom Musta2014-03-051-0/+2
* target-ppc: Altivec 2.07: Doubleword ComparesTom Musta2014-03-051-3/+13
* target-ppc: Altivec 2.07: vbpermq InstructionTom Musta2014-03-051-0/+2
* target-ppc: Altivec 2.07: Quadword Addition and SubtracationTom Musta2014-03-051-0/+18
* target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift InstructionsTom Musta2014-03-051-0/+8
* target-ppc: Altivec 2.07: Vector Merge InstructionsTom Musta2014-03-051-0/+37
* target-ppc: Altivec 2.07: Unpack Signed Word InstructionsTom Musta2014-03-051-0/+4
* target-ppc: Altivec 2.07: Pack Doubleword InstructionsTom Musta2014-03-051-0/+8
* target-ppc: Altivec 2.07: Vector Min/Max Doubleword InstructionsTom Musta2014-03-051-0/+8
* target-ppc: Altivec 2.07: Vector Population Count InstructionsTom Musta2014-03-051-4/+18
* target-ppc: Altivec 2.07: Add Vector Count Leading ZeroesTom Musta2014-03-051-0/+9
* target-ppc: Altivec 2.07: vmuluw InstructionTom Musta2014-03-051-1/+4
* target-ppc: Altivec 2.07: Multiply Even/Odd Word InstructionsTom Musta2014-03-051-0/+8
* target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword ModuloTom Musta2014-03-051-0/+4
* target-ppc: Altivec 2.07: Vector Logical InstructionsTom Musta2014-03-051-0/+11
* target-ppc: Altivec 2.07: Add Support for R-Form Dual InstructionsTom Musta2014-03-051-0/+35
* target-ppc: Altivec 2.07: Add Opcode Macro for VX Form InstructionsTom Musta2014-03-051-0/+5
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