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* target-ppc: convert most SPE integer instructions to TCGaurel322008-11-101-162/+0
* target-ppc: convert 405 MAC instructions to TCGaurel322008-11-011-95/+0
* target-ppc: convert arithmetic functions to TCGaurel322008-11-011-398/+0
* target-ppc: convert rotation instructions to TCGaurel322008-10-271-56/+0
* target-ppc: convert branch related instructions to TCGaurel322008-10-211-160/+0
* target-ppc: convert logical instructions to TCGaurel322008-10-211-248/+0
* target-ppc: convert crf related instructions to TCGaurel322008-10-211-179/+0
* target-ppc: Convert XER accesses to TCGaurel322008-10-211-75/+39
* PPC: convert SPE logical instructions to TCGaurel322008-10-151-48/+0
* PPC: convert effective address computation to TCGaurel322008-10-141-6/+0
* target-ppc: fix computation of XER.{CA, OV} in addme, subfmeaurel322008-10-011-8/+0
* target-ppc: fix mullw/mullwoaurel322008-10-011-0/+4
* ppc: Convert op_andi to TCGaurel322008-09-141-27/+0
* ppc: Convert ctr, lr moves to TCGaurel322008-09-141-24/+0
* ppc: Convert op_subf to TCGaurel322008-09-051-7/+0
* ppc: Convert op_add, op_addi to TCGaurel322008-09-051-13/+0
* ppc: replace op_set_FT0 with tcg_gen_movi_i64aurel322008-09-041-10/+0
* ppc: Convert nip moves to TCGaurel322008-09-041-30/+0
* ppc: Convert CRF moves to TCGaurel322008-09-041-36/+0
* ppc: Convert FPR moves to TCGaurel322008-09-041-72/+0
* [ppc] Convert op_moven_T2_T0 to TCGaurel322008-09-021-7/+0
* [ppc] Convert op_reset_T0, op_set_{T0, T1} to TCGaurel322008-09-021-42/+0
* [ppc] Convert op_move_{T1,T2}_T0 to TCGaurel322008-09-021-12/+0
* Revert commits 5082 and 5083aurel322008-08-241-0/+87
* PPC: Switch a few instructions to TCGaurel322008-08-241-87/+0
* Revert revisions r4168 and r4169. That's work in progress, not ready for trun...aurel322008-04-071-7/+7
* Always enable precise emulation when softfloat is usedaurel322008-04-071-7/+7
* Use float32/64 instead of float/doubleaurel322008-03-131-58/+27
* use the TCG code generatorbellard2008-02-011-15/+0
* Always make PowerPC hypervisor mode memory accesses and instructionsj_mayer2007-11-161-4/+0
* Allow use of SPE extension by all PowerPC targets,j_mayer2007-11-121-2/+0
* More PowerPC target -1 usage fixes (reservation address).j_mayer2007-11-121-1/+1
* Fix usage of the -1 constant in the PowerPC target code:j_mayer2007-11-121-10/+10
* Fix POWER abs & abso computation.j_mayer2007-11-111-2/+2
* Optimize PowerPC overflow flag computation in most useful cases.j_mayer2007-11-111-48/+22
* PowerPC 601 need specific callbacks for its BATs setup.j_mayer2007-11-041-11/+8
* Fix CR ops with complement, thanks to Julian Seward for testingj_mayer2007-10-311-19/+6
* Make Alpha and PowerPC targets use shared helpersj_mayer2007-10-281-2/+3
* Fix PowerPC FPSCR update and floating-point exception generationj_mayer2007-10-271-13/+113
* Use host-utils for PowerPC 64 64x64 bits multiplications.j_mayer2007-10-251-2/+2
* Gprof prooved the PowerPC emulation spent too much time in MSR load and storej_mayer2007-10-251-18/+23
* Generate micro-ops for PowerPC hypervisor mode.j_mayer2007-10-141-0/+5
* PowerPC target coding style fixes.j_mayer2007-10-071-2/+0
* Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer2007-10-051-0/+14
* Fix nasty sign-extensions when running 32 bits CPU in the 64 bits emulatorj_mayer2007-10-011-10/+10
* Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.cj_mayer2007-10-011-2/+8
* Handle all MMU models in switches, even if it's just to abort because of lackj_mayer2007-10-011-1/+14
* Avoid op helpers that would just call helpers for TLB & SLB management:j_mayer2007-10-011-15/+20
* Implement embedded PowerPC exceptions prefix and vectors registers.j_mayer2007-10-011-0/+15
* * Update OEA environment, following the PowerPC 2.04 specification:j_mayer2007-09-301-1/+22
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