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* PPC: KVM: Add support for EPR with KVMAlexander Graf2013-01-181-0/+21
| | | | | | This patch links KVM EPR support to the existing TCG support we have now. Signed-off-by: Alexander Graf <agraf@suse.de>
* cpu: Move cpu_index field to CPUStateAndreas Färber2013-01-151-5/+7
| | | | | | | | | | | | | Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-ppc: Error out for -cpu host on unknown PVRAndreas Färber2013-01-071-0/+8
| | | | | | | | | | Previously we silently exited, with subclasses we got an opcode warning. Instead, explicitly tell the user what's wrong. An indication for this is -cpu ? showing "host" with an all-zero PVR. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Slim conversion of model definitions to QOM subclassesAndreas Färber2013-01-071-7/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the model list is highly macrofied, keep ppc_def_t for now and save a pointer to it in PowerPCCPUClass. This results in a flat list of subclasses including aliases, to be refined later. Move cpu_ppc_init() to translate_init.c and drop helper.c. Long-term the idea is to turn translate_init.c into a standalone cpu.c. Inline cpu_ppc_usable() into type registration. Split cpu_ppc_register() in two by code movement into the initfn and by turning the remaining part into a realizefn. Move qemu_init_vcpu() call into the new realizefn and adapt create_ppc_opcodes() to return an Error. Change ppc_find_by_pvr() -> ppc_cpu_class_by_pvr(). Change ppc_find_by_name() -> ppc_cpu_class_by_name(). Turn -cpu host into its own subclass. This requires to move the kvm_enabled() check in ppc_cpu_class_by_name() to avoid the class being found via the normal name lookup in the !kvm_enabled() case. Turn kvmppc_host_cpu_def() into the class_init and add an initfn that asserts KVM is in fact enabled. Implement -cpu ? and the QMP equivalent in terms of subclasses. This newly exposes -cpu host to the user, ordered last for -cpu ?. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* PPC: KVM: set has-idle in guest device treeStuart Yoder2013-01-071-6/+26
| | | | | | | | | | | On e500mc, the platform doesn't provide a way for the CPU to go idle. To still not uselessly burn CPU time, expose an idle hypercall to the guest if kvm supports it. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> [agraf: adjust for current code base, add patch description, fix non-kvm case] Signed-off-by: Alexander Graf <agraf@suse.de>
* Merge branch 'master' of git://git.qemu.org/qemu into qom-cpuAndreas Färber2012-12-231-5/+5
|\ | | | | | | | | | | Adapt header include paths. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * softmmu: move include files to include/sysemu/Paolo Bonzini2012-12-191-4/+4
| | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * misc: move include files to include/qemu/Paolo Bonzini2012-12-191-1/+1
| | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | cpu: Move kvm_state field into CPUStateAndreas Färber2012-12-191-13/+20
| | | | | | | | | | | | Adapt some functions to take CPUState / {PowerPC,S390}CPU argument. Signed-off-by: Andreas Färber <afaerber@suse.de>
* | kvm: Pass CPUState to kvm_vcpu_ioctl()Andreas Färber2012-12-191-23/+32
| | | | | | | | | | | | Adapt helper functions to pass X86CPU / PowerPCCPU / S390CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
* | kvm: Pass CPUState to kvm_arch_*Andreas Färber2012-12-191-13/+23
|/ | | | | | | Move kvm_vcpu_dirty field into CPUState to simplify things and change its type to bool while at it. Signed-off-by: Andreas Färber <afaerber@suse.de>
* spapr: Pass PowerPCCPU to spapr_hypercall()Andreas Färber2012-10-311-1/+2
| | | | | | Needed for changing the hypercall handlers' argument type to PowerPCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpus: Pass CPUState to qemu_cpu_kick()Andreas Färber2012-10-311-2/+1
| | | | | | CPUArchState is no longer needed there. Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPUAndreas Färber2012-10-311-2/+6
| | | | | | Needed for changing qemu_cpu_kick() argument type to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
* Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agrafAurelien Jarno2012-10-061-39/+100
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: (35 commits) PPC: KVM: Fix BAT put PPC: e500: Only expose even TLB sizes in initial TLB ppc/pseries: Reset VPA registration on CPU reset pseries: Don't test for MSR_PR for hypercalls under KVM PPC: e500: calculate initrd_base like dt_base PPC: e500: increase DTC_LOAD_PAD device tree: simplify dumpdtb code fdt: move dumpdtb interpretation code to device_tree.c target-ppc: Remove unused power_mode field from cpu state pseries: Set hash table size based on RAM size pseries: Remove unnecessary locking from PAPR hash table hcalls ppc405_uc: Fix buffer overflow target-ppc: KVM: Fix some kernel version edge cases for kvmppc_reset_htab() pseries: Fix semantics of RTAS int-on, int-off and set-xive functions pseries: Rework implementation of TCE bypass pseries: Remove never used flags field from spapr vio devices pseries: Remove XICS irq type enum type pseries: Remove C bitfields from xics code pseries: Small cleanup to H_CEDE implementation pseries: Fix XICS reset ...
| * PPC: KVM: Fix BAT putAlexander Graf2012-10-051-4/+5
| | | | | | | | | | | | | | | | | | In the sregs API, upper and lower 32bit segments of the BAT registers are swapped when doing a set. Since we need to support old kernels out there, don't bother to fix it in the kernel, but instead work around the problem in QEMU by swapping on put. Signed-off-by: Alexander Graf <agraf@suse.de>
| * target-ppc: KVM: Fix some kernel version edge cases for kvmppc_reset_htab()David Gibson2012-10-041-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kvmppc_reset_htab() function invokes the KVM_PPC_ALLOCATE_HTAB vm ioctl to request KVM to allocate and reset a hash page table for the guest - it returns the size of hash table allocated, or 0 to indicate that qemu needs to allocate the hash table itself. In practice qemu needs to allocate the htab for full emulation and with Book3sPR KVM, but the kernel has to allocate it for Book3sHV KVM (the hash table needs to be physically contiguous in that case). Unfortunately, the logic in this function is incorrect for some existing kernels. Specifically: * at least some PR KVM versions advertise the relevant capability but don't actually implement the ioctl(), returning ENOTTY. * For old kernels which don't have the capability, we currently return 0. This is correct for PV KVM, where we need to allocate the htab, but not for HV KVM - kernels of this era always allocate a 16MB hash table per guest. This patch corrects both of these edge cases. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
| * pseries: Add support for new KVM hash table control callDavid Gibson2012-10-041-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for then new "reset htab" ioctl which allows qemu to properly cleanup the MMU hash table when the guest is reset. With the corresponding kernel support, reset of a guest now works properly. This also paves the way for indicating a different size hash table to the kernel and for the kernel to be able to impose limits on the requested size. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
| * ppc: Make kvm_arch_put_registers() put *all* the registersDavid Gibson2012-10-041-39/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At least when invoked with high enough 'level' arguments, kvm_arch_put_registers() is supposed to copy essentially all the cpu state as encoded in qemu's internal structures into the kvm state. Currently the ppc version does not do this - it never calls KVM_SET_SREGS, for example, and therefore never sets the SDR1 and various other important though rarely changed registers. Instead, the code paths which need to set these registers need to explicitly make (conditional) kvm calls which transfer the changes to kvm. This breaks the usual model of handling state updates in qemu, where code just changes the internal model and has it flushed out to kvm automatically at some later point. This patch fixes this for Book S ppc CPUs by adding a suitable call to KVM_SET_SREGS and als to KVM_SET_ONE_REG to set the HIOR (the only register that is set with that call so far). This lets us remove the hacks to explicitly set these registers from the kvmppc_set_papr() function. The problem still exists for Book E CPUs (which use a different version of the kvm_sregs structure). But fixing that has some complications of its own so can be left to another day. Lkewise, there is still some ugly code for setting the PVR through special calls to SET_SREGS which is left in for now. The PVR needs to be set especially early because it can affect what other features are available on the CPU, so I need to do more thinking to see if it can be integrated into the normal paths or not. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* | ppc: avoid buffer overrun: use pstrcpy, not strncpyJim Meyering2012-10-051-1/+1
|/ | | | | | | | | A terminal NUL is required by caller's use of strchr. It's better not to use strncpy at all, since there is no need to zero out hundreds of trailing bytes for each iteration. Signed-off-by: Jim Meyering <meyering@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ppc: Fix bug in handling of PAPR hypercall exitsDavid Gibson2012-08-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently for powerpc, kvm_arch_handle_exit() always returns 1, meaning that its caller - kvm_cpu_exec() - will always exit immediately afterwards to the loop in qemu_kvm_cpu_thread_fn(). There's no need to do this. Once we've handled the hypercall there's no reason we can't go straight around and KVM_RUN again, which is what ret = 0 will signal. The only exception might be for hypercalls which affect the state of cpu_can_run(), however the only one that might do this is H_CEDE and for kvm that is always handled in the kernel, not qemu. Furtherm setting ret = 0 means that when exit_requested is set from a hypercall, we will enter KVM_RUN once more with a signal which lets the the kernel do its internal logic to complete the hypercall with out actually executing any more guest code. This is important if our hypercall also triggered a reset, which previously would re-initialize everything without completing the hypercall. This caused the kernel to get confused because it thought the guest was still in the middle of a hypercall when it has actually been reset. This patch therefore changes to ret = 0, which is both a bugfix and a small optimization. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* pseries: Convert sPAPR TCEs to use generic IOMMU infrastructureDavid Gibson2012-06-271-2/+2
| | | | | | | | | | | | | | | | | | | | The pseries platform already contains an IOMMU implementation, since it is essential for the platform's paravirtualized VIO devices. This IOMMU support is currently built into the implementation of the VIO "bus" and the various VIO devices. This patch converts this code to make use of the new common IOMMU infrastructure. We don't yet handle synchronization of map/unmap callbacks vs. invalidations, this will require some complex interaction with the kernel and is not a major concern at this stage. Cc: Alex Graf <agraf@suse.de> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ppc64: Rudimentary Support for extra page sizes on server CPUsBenjamin Herrenschmidt2012-06-241-0/+208
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | More recent Power server chips (i.e. based on the 64 bit hash MMU) support more than just the traditional 4k and 16M page sizes. This can get quite complicated, because which page sizes are supported, which combinations are supported within an MMU segment and how these page sizes are encoded both in the SLB entry and the hash PTE can vary depending on the CPU model (they are not specified by the architecture). In addition the firmware or hypervisor may not permit use of certain page sizes, for various reasons. Whether various page sizes are supported on KVM, for example, depends on whether the PR or HV variant of KVM is in use, and on the page size of the memory backing the guest's RAM. This patch adds information to the CPUState and cpu defs to describe the supported page sizes and encodings. Since TCG does not yet support any extended page sizes, we just set this to NULL in the static CPU definitions, expanding this to the default 4k and 16M page sizes when we initialize the cpu state. When using KVM, however, we instead determine available page sizes using the new KVM_PPC_GET_SMMU_INFO call. For old kernels without that call, we use some defaults, with some guesswork which should do the right thing for existing HV and PR implementations. The fallback might not be correct for future versions, but that's ok, because they'll have KVM_PPC_GET_SMMU_INFO. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Add hooks for handling tcg and kvm limitationsDavid Gibson2012-04-151-0/+14
| | | | | | | | | | | | | | | | | On target-ppc, our table of CPU types and features encodes the features as found on the hardware, regardless of whether these features are actually usable under TCG or KVM. We already have cases where the information from the cpu table must be fixed up to account for limitations in the emulation method we're using. e.g. TCG does not support the DFP and VSX instructions and KVM needs different numbering of the CPUs in order to tell it the correct thread to core mappings. This patch cleans up these hacks to handle emulation limitations by consolidating them into a pair of functions specifically for the purpose. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [AF: Style and typo fixes, rename new functions and drop ppc_def_t arg] Signed-off-by: Andreas Färber <afaerber@suse.de>
* Replace Qemu by QEMU in commentsStefan Weil2012-04-071-1/+1
| | | | | | | | | The official spelling is QEMU. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> [blauwirbel@gmail.com: fixed comment style in hw/sun4m.c] Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* pseries: Don't try to munmap() a malloc()ed TCE tableDavid Gibson2012-03-151-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | For the pseries machine, TCE (IOMMU) tables can either be directly malloc()ed in qemu or, when running on a KVM which supports it, mmap()ed from a KVM ioctl. The latter option is used when available, because it allows the (frequent bottlenext) H_PUT_TCE hypercall to be KVM accelerated. However, even when KVM is persent, TCE acceleration is not always possible. Only KVM HV supports this ioctl(), not KVM PR, or the kernel could run out of contiguous memory to allocate the new table. In this case we need to fall back on the malloc()ed table. When a device is removed, and we need to remove the TCE table, we need to either munmap() or free() the table as appropriate for how it was allocated. The code is supposed to do that, but we buggily fail to initialize the tcet->fd variable in the malloc() case, which is used as a flag to determine which is the right choice. This patch fixes the bug, and cleans up error messages relating to this path while we're at it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Don't overuse CPUStateAndreas Färber2012-03-141-19/+19
| | | | | | | | | Scripted conversion: sed -i "s/CPUState/CPUPPCState/g" target-ppc/*.[hc] sed -i "s/#define CPUPPCState/#define CPUState/" target-ppc/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
* PPC: KVM: Update HIOR code to new interfaceAlexander Graf2012-02-021-3/+7
| | | | | | | | | | | | | | | | | | Unfortunately the HIOR setting code slipped into upstream QEMU before it was pulled into upstream KVM. And since Murphy is always right, comments on the patches only emerged on the pull request leading to changes in the interface. So here's an update to the HIOR setting. While at it, I also relaxed it a bit since for HV KVM we can already run fine without and 3.2 works just fine with HV KVM but when not setting HIOR. We will only need this when running PAPR in PR KVM. Since we accidently changed the ABI and API along the way, we have to update the underlying kernel headers together with the code that uses it to not break bisectability. Signed-off-by: Alexander Graf <agraf@suse.de>
* kvm: fix build error in ppc kvm due to memory_region_init_ram_ptr() changeAvi Kivity2012-01-081-1/+2
| | | | | | | | Commit c5705a772 ("vmstate, memory: decouple vmstate from memory API") changed the signature of memory_region_init_ram_ptr() but did not update a caller in the ppc kvm module. Fix. Signed-off-by: Avi Kivity <avi@redhat.com>
* kvm-ppc: halt secondary cpus when guest resetLiu Yu-B132012012-01-031-1/+1
| | | | | | | | | When guest reset, we need to halt secondary cpus until guest kick them. This already works for tcg. The patch add the support for kvm. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de> [agraf: remove in-kernel irqchip code]
* pseries: Allow writes to KVM accelerated TCE tableDavid Gibson2011-10-301-1/+1
| | | | | | | | | | | | | | | | | | | | Sufficiently recent kernels include a KVM call to accelerate use of PAPR TCE tables (IOMMU), which are used by PAPR virtual IO devices. This involves qemu mapping the TCE table in from a kernel obtained fd, which currently we do with PROT_READ only. This is a hangover from early (never released) versions of this kernel interface which only permitted read-only mappings and required us to destroy and recreate the table when we needed to clear it from qemu. Now, the kernel permits read-write mappings, and we rely on this to clear the table in spapr_vio_quiesce_one(). However, due to insufficient testing, I forgot to update the actual mapping of the table in kvmppc_create_spapr_tce() to add PROT_WRITE to the mmap(). This patch corrects the oversight. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* KVM: PPC: Override host vmx/vsx/dfp only when information knownAlexander Graf2011-10-301-3/+9
| | | | | | | | | | | | | | | | The -cpu host feature tries to find out the host capabilities based on device tree information. However, we don't always have that available because it's an optional property in dt. So instead of force unsetting values depending on an unreliable source of information, let's just try to be clever about it and not override capabilities when we don't know the device tree pieces. This fixes altivec with -cpu host on YDL PowerStations. Reported-by: Nishanth Aravamudan <nacc@us.ibm.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* pseries: Correct vmx/dfp handling in both KVM and TCG casesDavid Gibson2011-10-301-1/+22
| | | | | | | | | | | | | | | | | | | | Currently, when KVM is enabled, the pseries machine checks if the host CPU supports VMX, VSX and/or DFP instructions and advertises accordingly in the guest device tree. It does this regardless of what CPU is selected on the command line. On the other hand, when in TCG mode, it never advertises any of these facilities, even basic VMX (Altivec) which is supported in TCG. Now that we have a -cpu host option for ppc, it is fairly straightforward to fix both problems. This patch changes the -cpu host code to override the basic cpu spec derived from the PVR with information queried from the host avout VMX, VSX and DFP capability. The pseries code then uses the instruction availability advertised in the cpu state to set the guest device tree correctly for both the KVM and TCG cases. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* ppc: First cut implementation of -cpu hostDavid Gibson2011-10-301-0/+19
| | | | | | | | | | | | | | | | | | | | | For convenience with kvm, x86 allows the user to specify -cpu host on the qemu command line, which means make the guest cpu the same as the host cpu. This patch implements the same option for ppc targets. For now, this just read the host PVR (Processor Version Register) and selects one of our existing CPU specs based on it. This means that the option will not work if the host cpu is not supported by TCG, even if that wouldn't matter for use under kvm. In future, we can extend this in future to override parts of the cpu spec based on information obtained from the host (via /proc/cpuinfo, the host device tree, or explicit KVM calls). That will let us handle cases where the real kvm-virtualized CPU doesn't behave exactly like the TCG-emulated CPU. With appropriate annotation of the CPU specs we'll also then be able to use host cpus under kvm even when there isn't a matching full TCG model. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* pseries: Add device tree properties for VMX/VSX and DFP under kvmDavid Gibson2011-10-301-0/+10
| | | | | | | | | | | | | | | | | | | | | Sufficiently recent PAPR specifications define properties "ibm,vmx" and "ibm,dfp" on the CPU node which advertise whether the VMX vector extensions (or the later VSX version) and/or the Decimal Floating Point operations from IBM's recent POWER CPUs are available. Currently we do not put these in the guest device tree and the guest kernel will consequently assume they are not available. This is good, because they are not supported under TCG. VMX is similar enough to Altivec that it might be trivial to support, but VSX and DFP would both require significant work to support in TCG. However, when running under kvm on a host which supports these instructions, there's no reason not to let the guest use them. This patch, therefore, checks for the relevant support on the host CPU and, if present, advertises them to the guest as well. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* ppc: Generalize the kvmppc_get_clockfreq() functionDavid Gibson2011-10-301-11/+24
| | | | | | | | | | | | | | | Currently the kvmppc_get_clockfreq() function reads the host's clock frequency from /proc/device-tree, which is useful to past to the guest in KVM setups. However, there are some other host properties advertised in the device tree which can also be relevant to the guests. This patch, therefore, replaces kvmppc_get_clockfreq() which can retrieve any named, single integer property from the host device tree's CPU node. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* pseries: Use Book3S-HV TCE acceleration capabilitiesDavid Gibson2011-10-301-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | The pseries machine of qemu implements the TCE mechanism used as a virtual IOMMU for the PAPR defined virtual IO devices. Because the PAPR spec only defines a small DMA address space, the guest VIO drivers need to update TCE mappings very frequently - the virtual network device is particularly bad. This means many slow exits to qemu to emulate the H_PUT_TCE hypercall. Sufficiently recent kernels allow this to be mitigated by implementing H_PUT_TCE in the host kernel. To make use of this, however, qemu needs to initialize the necessary TCE tables, and map them into itself so that the VIO device implementations can retrieve the mappings when they access guest memory (which is treated as a virtual DMA operation). This patch adds the necessary calls to use the KVM TCE acceleration. If the kernel does not support acceleration, or there is some other error creating the accelerated TCE table, then it will still fall back to full userspace TCE implementation. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* pseries: Allow KVM Book3S-HV on PPC970 CPUSDavid Gibson2011-10-301-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | At present, using the hypervisor aware Book3S-HV KVM will only work with qemu on POWER7 CPUs. PPC970 CPUs also have hypervisor capability, but they lack the VRMA feature which makes assigning guest memory easier. In order to allow KVM Book3S-HV on PPC970, we need to specially allocate the first chunk of guest memory (the "Real Mode Area" or RMA), so that it is physically contiguous. Sufficiently recent host kernels allow such contiguous RMAs to be allocated, with a kvm capability advertising whether the feature is available and/or necessary on this hardware. This patch enables qemu to use this support, thus allowing kvm acceleration of pseries qemu machines on PPC970 hardware. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de> --- agraf: fix to use memory api
* pseries: Support SMT systems for KVM Book3S-HVDavid Gibson2011-10-301-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Alex Graf has already made qemu support KVM for the pseries machine when using the Book3S-PR KVM variant (which runs the guest in usermode, emulating supervisor operations). This code allows gets us very close to also working with KVM Book3S-HV (using the hypervisor capabilities of recent POWER CPUs). This patch moves us another step towards Book3S-HV support by correctly handling SMT (multithreaded) POWER CPUs. There are two parts to this: * Querying KVM to check SMT capability, and if present, adjusting the cpu numbers that qemu assigns to cause KVM to assign guest threads to cores in the right way (this isn't automatic, because the POWER HV support has a limitation that different threads on a single core cannot be in different guests at the same time). * Correctly informing the guest OS of the SMT thread to core mappings via the device tree. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* KVM: PPC: Use HIOR setting for -M pseries with PR KVMAlexander Graf2011-10-061-3/+22
| | | | | | | | | | | | When running with PR KVM, we need to set HIOR directly. Thankfully there is now a new interface to set registers individually so we can just use that and poke HIOR into the guest vcpu's HIOR register. While at it, this also sets SDR1 because -M pseries requires it to run. With this patch, -M pseries works properly with PR KVM. Signed-off-by: Alexander Graf <agraf@suse.de>
* kvm: ppc: booke206: use MMU APIScott Wood2011-10-061-0/+85
| | | | | | | | | Share the TLB array with KVM. This allows us to set the initial TLB both on initial boot and reset, is useful for debugging, and could eventually be used to support migration. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* PPC: Enable to use PAPR with PR style KVMAlexander Graf2011-10-061-0/+40
| | | | | | | | | | | | | | | | | | | | | | When running PR style KVM, we need to tell the kernel that we want to run in PAPR mode now. This means that we need to pass some more register information down and enable papr mode. We also need to align the HTAB to htab_size boundary. Using this patch, -M pseries works with kvm even on non-hv kvm implementations, as long as the preceding kernel patches are in. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - match on CONFIG_PSERIES v2 -> v3: - remove HIOR pieces from PAPR patch (ABI breakage)
* PPC: KVM: Add generic function to read host clockfreqAlexander Graf2011-10-061-0/+67
| | | | | | | | | | | | | We need to find out the host's clock-frequency when running on KVM, so let's export a respective function. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - enable 64bit values
* kvm: ppc: Drop KVM_CAP build dependenciesJan Kiszka2011-06-201-14/+0
| | | | | | | | | No longer needed with accompanied kernel headers. CC: Alexander Graf <agraf@suse.de> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: ppc: Drop CONFIG_KVM_PPC_PVRJan Kiszka2011-06-201-9/+0
| | | | | | | | | Required header support is now unconditionally available. CC: Alexander Graf <agraf@suse.de> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* PPC: fix sregs usage on bookeAlexander Graf2011-06-031-6/+4
| | | | | | | | | | | | | | | | | When compiling qemu with kvm support on BookE PPC machines, I get the following error: cc1: warnings being treated as errors /tmp/qemu/target-ppc/kvm.c: In function 'kvm_arch_get_registers': /tmp/qemu/target-ppc/kvm.c:188: error: unused variable 'sregs' This is due to overly ambitious #ifdef'ery introduced in 90dc88. Fix it by keeping code that doesn't depend on new headers alive for the compiler, but never executed due to failing capability checks. CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* kvm: ppc: detect old headersAlexander Graf2011-05-091-1/+15
| | | | | | | | | | | | When compiling Qemu with older kernel headers, the PVR setting mechanism isn't available yet. Unfortunately, back then I didn't add a capability we could check against, so all we can do is add a configure test to see if we support PVR setting. For BookE, we don't care yet. This fixes compilation errors with KVM enabled on older kernel headers (like 2.6.32). Signed-off-by: Alexander Graf <agraf@suse.de>
* monitor: add PPC BookE SPRsScott Wood2011-05-091-9/+134
| | | | | | | | | | Read them via KVM_GET_SREGS in kvm_arch_get_registers(), and display them in "info registers". Also get CR and PID from the existing KVM_GET_REGS. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* kvm: ppc: fixes for KVM_SET_SREGS on initScott Wood2011-05-091-3/+30
| | | | | | | | | | | | | | | | | | | | | Classic/server ppc has had SREGS for a while now (though I think not always?), but it's still missing for booke. Check the capability before calling KVM_SET_SREGS. Without this, booke kvm fails to boot as of commit 84b4915dd2c0eaa86c970ffc42a68ea8ba9e48b5 (kvm: Handle kvm_init_vcpu errors). Also, don't write random stack state into the non-PVR sregs fields -- have kvm fill it in first. Eventually booke will have sregs and it will have its own capability to be tested here. However, we will want a way for platform code to request to look like the actual CPU we're running on, especially if SoC devices are being directly assigned. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* Parse SDR1 on mtspr instead of at translate timeDavid Gibson2011-04-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | On ppc machines with hash table MMUs, the special purpose register SDR1 contains both the base address of the encoded size (hashed) page tables. At present, we interpret the SDR1 value within the address translation path. But because the encodings of the size for 32-bit and 64-bit are different this makes for a confusing branch on the MMU type with a bunch of curly shifts and masks in the middle of the translate path. This patch cleans things up by moving the interpretation on SDR1 into the helper function handling the write to the register. This leaves a simple pre-sanitized base address and mask for the hash table in the CPUState structure which is easier to work with in the translation path. This makes the translation path more readable. It addresses the FIXME comment currently in the mtsdr1 helper, by validating the SDR1 value during interpretation. Finally it opens the way for emulating a pSeries-style partition where the hash table used for translation is not mapped into the guests's RAM. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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