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* target-ppc: Altivec 2.07: Pack Doubleword InstructionsTom Musta2014-03-051-0/+4
* target-ppc: Altivec 2.07: Vector Min/Max Doubleword InstructionsTom Musta2014-03-051-0/+2
* target-ppc: Altivec 2.07: Vector Population Count InstructionsTom Musta2014-03-051-0/+14
* target-ppc: Altivec 2.07: Add Vector Count Leading ZeroesTom Musta2014-03-051-0/+29
* target-ppc: Altivec 2.07: vmuluw InstructionTom Musta2014-03-051-0/+1
* target-ppc: Altivec 2.07: Multiply Even/Odd Word InstructionsTom Musta2014-03-051-0/+2
* target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit IntegersTom Musta2014-03-051-12/+14
* target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword ModuloTom Musta2014-03-051-0/+1
* target-ppc: Add ISA 2.06 divwe[o] InstructionsTom Musta2014-03-051-0/+32
* target-ppc: Add ISA 2.06 divweu[o] InstructionsTom Musta2014-03-051-0/+31
* target-ppc: Add ISA2.06 divde[o] InstructionsTom Musta2014-03-051-0/+23
* target-ppc: Add ISA2.06 divdeu[o] InstructionsTom Musta2014-03-051-0/+27
* target-ppc: Add ISA2.06 bpermd InstructionTom Musta2014-03-051-0/+20
* target-ppc: emulate cmpb instructionAurelien Jarno2013-04-261-0/+15
* target-ppc: Split out SO, OV, CA fields from XERRichard Henderson2013-02-231-23/+15
* target-ppc: Use mul*2 in mulh* insnsRichard Henderson2013-02-231-18/+0
* misc: move include files to include/qemu/Paolo Bonzini2012-12-191-1/+1
* target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macrosAurelien Jarno2012-10-041-21/+0
* target-ppc: use the softfloat float32_muladd functionAurelien Jarno2012-10-041-43/+14
* target-ppc: use the softfloat min/max functionsAurelien Jarno2012-10-041-21/+2
* target-ppc: simplify NaN propagation for vector functionsAurelien Jarno2012-10-041-19/+7
* ppc: Make hbrev table constBlue Swirl2012-06-241-1/+1
* ppc: Avoid AREG0 for integer and vector helpersBlue Swirl2012-06-241-47/+73
* ppc: Split integer and vector opsBlue Swirl2012-06-241-0/+1538
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