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* target-ppc: emulate cmpb instructionAurelien Jarno2013-04-261-0/+15
| | | | | | | | Needed for Power ISA version 2.05 compliance. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Split out SO, OV, CA fields from XERRichard Henderson2013-02-231-23/+15
| | | | | | | | In preparation for more efficient setting of these fields. Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-ppc: Use mul*2 in mulh* insnsRichard Henderson2013-02-231-18/+0
| | | | | | Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* misc: move include files to include/qemu/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macrosAurelien Jarno2012-10-041-21/+0
| | | | | | | We can finally get rid of the ugly HANDLE_NAN{1,2,3} macros. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: use the softfloat float32_muladd functionAurelien Jarno2012-10-041-43/+14
| | | | | | | | | | Use the new softfloat float32_muladd() function to implement the vmaddfp and vnmsubfp instructions. As a bonus we can get rid of the call to the HANDLE_NAN3 macro, as the NaN handling is directly done at the softfloat level. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: use the softfloat min/max functionsAurelien Jarno2012-10-041-21/+2
| | | | | | | | | | Use the new softfloat float32_min() and float32_max() to implement the vminfp and vmaxfp instructions. As a bonus we can get rid of the call to the HANDLE_NAN2 macro, as the NaN handling is directly done at the softfloat level. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: simplify NaN propagation for vector functionsAurelien Jarno2012-10-041-19/+7
| | | | | | | | | | Commit e024e881bb1a8b5085026589360d26ed97acdd64 provided a pickNaN() function for PowerPC, implementing the correct NaN propagation rules. Therefore there is no need to test the operands manually, we can rely on the softfloat code to do that. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
* ppc: Make hbrev table constBlue Swirl2012-06-241-1/+1
| | | | | | | | | Lookup table 'hbrev' is never written to, so add a 'const' qualifier. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* ppc: Avoid AREG0 for integer and vector helpersBlue Swirl2012-06-241-47/+73
| | | | | | | | | | Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> [fix unwanted whitespace line in Makefile.target] Signed-off-by: Alexander Graf <agraf@suse.de>
* ppc: Split integer and vector opsBlue Swirl2012-06-241-0/+1538
Move integer and vector ops to int_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
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