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path: root/target-ppc/cpu.h
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* Add MSR VSX and Associated ExceptionTom Musta2013-12-201-0/+4
* Declare and Enable VSXTom Musta2013-12-201-1/+4
* target-ppc: Use #define for max slb entriesAneesh Kumar K.V2013-10-251-1/+2
* target-ppc: USE LPCR_ILE to control exception endian on POWER7Anton Blanchard2013-09-021-0/+2
* target-ppc: Convert ppc cpu savevm to VMStateDescriptionAlexey Kardashevskiy2013-07-291-5/+3
* cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber2013-07-231-5/+0
* linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-userPeter Maydell2013-07-091-20/+0
* target-ppc: Introduce unrealizefn for PowerPCCPUAndreas Färber2013-07-011-1/+3
* PPC: Add MMU type for 2.06 with AMR but no TB pagesAlexander Graf2013-05-061-0/+3
* target-ppc: add instruction flags for Book I 2.05Aurelien Jarno2013-04-261-1/+3
* target-ppc: Add more stubs for POWER7 PMU registersDavid Gibson2013-04-261-0/+1
* PPC: Remove env->hreset_excp_prefixFabien Chouteau2013-04-261-1/+0
* target-ppc: Move ppc tlb_fill implementation into mmu_helper.cDavid Gibson2013-03-221-2/+0
* target-ppc: Split user only code out of mmu_helper.cDavid Gibson2013-03-221-1/+4
* mmu-hash64: Implement Virtual Page Class Key ProtectionDavid Gibson2013-03-221-2/+6
* mmu-hash*: Add header file for definitionsDavid Gibson2013-03-221-24/+0
* target-ppc: mmu_ctx_t should not be a global typeDavid Gibson2013-03-221-14/+0
* target-ppc: Disentangle BAT code for 32-bit hash MMUsDavid Gibson2013-03-221-2/+0
* target-ppc: Don't share get_pteg_offset() between 32 and 64-bitDavid Gibson2013-03-221-1/+0
* target-ppc: Disentangle hash mmu helper functionsDavid Gibson2013-03-221-3/+0
* target-ppc: Disentangle get_physical_address() pathsDavid Gibson2013-03-221-0/+2
* target-ppc: Disentangle find_pte()David Gibson2013-03-221-0/+2
* target-ppc: Disentangle pte_check()David Gibson2013-03-221-0/+2
* target-ppc: Move SLB handling into a mmu-hash64.cDavid Gibson2013-03-221-3/+0
* target-ppc: Trivial cleanups in mmu_helper.cDavid Gibson2013-03-221-3/+0
* target-ppc: Remove vestigial PowerPC 620 supportDavid Gibson2013-03-221-30/+0
* PPC/GDB: handle read and write of fpscrFabien Chouteau2013-03-221-0/+2
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-121-1/+0
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-121-2/+3
* target-ppc: Add mechanism for synchronizing SPRs with KVMDavid Gibson2013-03-081-0/+6
* target-ppc: Convert CPU definitionsAndreas Färber2013-03-081-20/+0
* target-ppc: Split out SO, OV, CA fields from XERRichard Henderson2013-02-231-4/+20
* PPC: Unify dcbzl code pathAlexander Graf2013-02-011-4/+2
* target-ppc: Slim conversion of model definitions to QOM subclassesAndreas Färber2013-01-071-4/+0
* PPC: Bring EPR support closer to realityAlexander Graf2013-01-071-1/+3
* fpu: move public header file to include/fpuPaolo Bonzini2012-12-191-1/+1
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-3/+3
* target-ppc: Don't use hwaddr to represent hardware stateDavid Gibson2012-12-141-1/+1
* Merge branch 'trivial-patches' of git://github.com/stefanha/qemuBlue Swirl2012-11-031-7/+0
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| * target-ppc: make some functions staticBlue Swirl2012-11-011-6/+0
| * ppc: add missing staticBlue Swirl2012-11-011-1/+0
* | Merge remote-tracking branch 'afaerber/qom-cpu' into stagingAnthony Liguori2012-11-011-2/+4
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| * | cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber2012-10-311-1/+3
| * | target-ppc: Pass PowerPCCPU to cpu_ppc_hypercallAndreas Färber2012-10-311-1/+1
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* | target-ppc: Extend FPU state for newer POWER CPUsDavid Gibson2012-11-011-1/+3
* | target-ppc: Rework storage of VPA registration stateDavid Gibson2012-11-011-3/+3
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* target-ppc: Rework storage of VPA registration stateDavid Gibson2012-10-291-4/+3
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-231-12/+12
* target-ppc: Remove unused power_mode field from cpu stateDavid Gibson2012-10-041-1/+0
* PPC: BookE206: Bump MAS2 to 64bitAlexander Graf2012-06-241-1/+1
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