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* fpu: move public header file to include/fpuPaolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* misc: move include files to include/qemu/Paolo Bonzini2012-12-194-5/+5
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qom: move include files to include/qom/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: move include files to include/exec/Paolo Bonzini2012-12-196-14/+14
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qapi: move include files to include/qobject/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* build: kill libdis, move disassemblers to disas/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: refactor cpu_restore_stateBlue Swirl2012-12-161-9/+1
| | | | | | | | Refactor common code around calls to cpu_restore_state(). tb_find_pc() has now no external users, make it static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin2012-12-081-3/+3
| | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin2012-12-081-1/+1
| | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin2012-12-081-2/+2
| | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-openrisc: remove conflicting definitions from cpu.hAurelien Jarno2012-11-241-18/+0
| | | | | | | | | | | On an ARM host, the registers definitions from cpu.h clash with /usr/include/sys/ucontext.h. As there are unused, just remove them. Cc: Jia Liu <proljc@gmail.com> Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin2012-11-171-4/+5
| | | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin2012-11-171-5/+5
| | | | | | Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* disas: avoid using cpu_single_envBlue Swirl2012-11-101-1/+1
| | | | | | | | | Pass around CPUArchState instead of using global cpu_single_env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
* cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber2012-10-311-1/+3
| | | | | | | | | | For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-232-12/+12
| | | | | | | | | | | | | | | target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson2012-09-271-1/+1
| | | | | | | | | | | For all targets that currently call tcg_gen_debug_insn_start, add CPU_LOG_TB_OP_OPT to the condition that gates it. This is useful for comparing optimization dumps, when the pre-optimization dump is merely noise. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-or32: Add linux user supportJia Liu2012-07-271-0/+12
| | | | | | | Add QEMU OpenRISC linux user support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-or32: Add system instructionsJia Liu2012-07-275-1/+321
| | | | | | | Add OpenRISC system instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-or32: Add timer supportJia Liu2012-07-271-0/+22
| | | | | | | Add OpenRISC timer support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-or32: Add PIC supportJia Liu2012-07-271-0/+3
| | | | | | | Add OpenRISC Programmable Interrupt Controller support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-or32: Add instruction translationJia Liu2012-07-271-0/+1734
| | | | | | | Add OpenRISC instruction tanslation routines. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-or32: Add float instruction helpersJia Liu2012-07-273-1/+335
| | | | | | | Add OpenRISC float instruction helpers. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-or32: Add int instruction helpersJia Liu2012-07-273-1/+85
| | | | | | | Add OpenRISC int instruction helpers. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-or32: Add exception supportJia Liu2012-07-275-2/+89
| | | | | | | Add OpenRISC exception support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-or32: Add interrupt supportJia Liu2012-07-275-2/+134
| | | | | | | Add OpenRISC interrupt support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-or32: Add MMU supportJia Liu2012-07-273-2/+303
| | | | | | | Add OpenRISC MMU support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-or32: Add target stubs and QOM cpuJia Liu2012-07-278-0/+792
Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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