| Commit message (Expand) | Author | Age | Files | Lines |
... | |
* | target-mips: stop translation after ctc1 | Yongbok Kim | 2014-11-03 | 1 | -0/+6 |
* | target-mips: remove duplicated mips/ieee mapping function | Yongbok Kim | 2014-11-03 | 3 | -9/+6 |
* | target-mips: add MSA exceptions | Yongbok Kim | 2014-11-03 | 1 | -0/+10 |
* | target-mips: add MSA defines and data structure | Yongbok Kim | 2014-11-03 | 3 | -2/+52 |
* | target-mips: enable features in MIPS64R6-generic CPU | Leon Alrae | 2014-11-03 | 1 | -2/+9 |
* | target-mips: correctly handle access to unimplemented CP0 register | Leon Alrae | 2014-11-03 | 1 | -278/+260 |
* | target-mips: add restrictions for possible values in registers | Leon Alrae | 2014-11-03 | 1 | -17/+53 |
* | target-mips: CP0_Status.CU0 no longer allows the user to access CP0 | Leon Alrae | 2014-11-03 | 1 | -1/+2 |
* | target-mips: implement forbidden slot | Leon Alrae | 2014-11-03 | 2 | -36/+76 |
* | target-mips: add Config5.SBRI | Leon Alrae | 2014-11-03 | 2 | -3/+32 |
* | target-mips: update cpu_save/cpu_load to support new registers | Leon Alrae | 2014-11-03 | 2 | -2/+26 |
* | target-mips: add BadInstr and BadInstrP support | Leon Alrae | 2014-11-03 | 4 | -11/+133 |
* | target-mips: add TLBINV support | Leon Alrae | 2014-11-03 | 6 | -8/+92 |
* | target-mips: add new Read-Inhibit and Execute-Inhibit exceptions | Leon Alrae | 2014-11-03 | 2 | -2/+28 |
* | target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1} | Leon Alrae | 2014-11-03 | 5 | -5/+57 |
* | target-mips: add RI and XI fields to TLB entry | Leon Alrae | 2014-11-03 | 3 | -1/+29 |
* | target-mips: distinguish between data load and instruction fetch | Leon Alrae | 2014-11-03 | 1 | -11/+10 |
* | target-mips: add KScratch registers | Leon Alrae | 2014-11-03 | 2 | -0/+47 |
* | target-mips: add ULL suffix in bitswap to avoid compiler warning | Leon Alrae | 2014-10-24 | 1 | -6/+6 |
* | target-mips: Remove unused gen_load_ACX, gen_store_ACX and cpu_ACX | Peter Maydell | 2014-10-14 | 1 | -19/+1 |
* | target-mips/dsp_helper.c: Add ifdef guards around various functions | Peter Maydell | 2014-10-14 | 1 | -1/+16 |
* | target-mips/translate.c: Add ifdef guard around check_mips64() | Peter Maydell | 2014-10-14 | 1 | -0/+2 |
* | target-mips/op_helper.c: Remove unused do_lbu() function | Peter Maydell | 2014-10-14 | 1 | -1/+0 |
* | target-mips/dsp_helper.c: Remove unused function get_DSPControl_24() | Peter Maydell | 2014-10-14 | 1 | -9/+0 |
* | target-mips: fix broken MIPS16 and microMIPS | Yongbok Kim | 2014-10-14 | 2 | -188/+123 |
* | target-mips/translate.c: Update OPC_SYNCI | Dongxue Zhang | 2014-10-14 | 1 | -1/+6 |
* | target-mips: define a new generic CPU supporting MIPS64 Release 6 ISA | Leon Alrae | 2014-10-14 | 1 | -0/+30 |
* | target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructions | Yongbok Kim | 2014-10-14 | 1 | -2/+16 |
* | target-mips: do not allow Status.FR=0 mode in 64-bit FPU | Leon Alrae | 2014-10-14 | 1 | -0/+6 |
* | target-mips: add new Floating Point Comparison instructions | Yongbok Kim | 2014-10-14 | 3 | -2/+342 |
* | target-mips: add new Floating Point instructions | Leon Alrae | 2014-10-14 | 3 | -44/+521 |
* | target-mips: add AUI, LSA and PCREL instruction families | Leon Alrae | 2014-10-14 | 1 | -14/+189 |
* | target-mips: add compact and CP1 branches | Yongbok Kim | 2014-10-13 | 1 | -14/+459 |
* | target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions | Yongbok Kim | 2014-10-13 | 3 | -12/+136 |
* | target-mips: Status.UX/SX/KX enable 32-bit address wrapping | Leon Alrae | 2014-10-13 | 2 | -9/+15 |
* | target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6 | Leon Alrae | 2014-10-13 | 1 | -59/+62 |
* | target-mips: redefine Integer Multiply and Divide instructions | Leon Alrae | 2014-10-13 | 1 | -21/+322 |
* | target-mips: move PREF, CACHE, LLD and SCD instructions | Leon Alrae | 2014-10-13 | 1 | -1/+28 |
* | target-mips: signal RI Exception on DSP and Loongson instructions | Leon Alrae | 2014-10-13 | 1 | -97/+98 |
* | target-mips: split decode_opc_special* into *_r6 and *_legacy | Leon Alrae | 2014-10-13 | 1 | -68/+160 |
* | target-mips: extract decode_opc_special* from decode_opc | Leon Alrae | 2014-10-13 | 1 | -805/+845 |
* | target-mips: move LL and SC instructions | Leon Alrae | 2014-10-13 | 1 | -2/+26 |
* | target-mips: add SELEQZ and SELNEZ instructions | Leon Alrae | 2014-10-13 | 1 | -2/+16 |
* | target-mips: signal RI Exception on instructions removed in R6 | Leon Alrae | 2014-10-13 | 1 | -8/+56 |
* | target-mips: define ISA_MIPS64R6 | Leon Alrae | 2014-10-13 | 1 | -9/+19 |
* | gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag | Peter Maydell | 2014-10-06 | 1 | -0/+1 |
* | target-mips: Use cpu_exec_interrupt qom hook | Richard Henderson | 2014-09-25 | 3 | -0/+19 |
* | trace: [tcg] Include TCG-tracing header on all targets | LluĂs Vilanova | 2014-08-12 | 1 | -0/+3 |
* | target-mips: Ignore unassigned accesses with KVM | James Hogan | 2014-08-07 | 1 | -0/+11 |
* | target-mips/translate.c: Free TCG in OPC_DINSV | Dongxue Zhang | 2014-07-28 | 1 | -0/+3 |