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* target-mips: fix mipsdsp_mul_q31_q31Petar Jovanovic2013-07-291-1/+1
* target-mips: Remove assignment to a variable which is never usedStefan Weil2013-07-291-1/+0
* target-mips: fix mipsdsp_trunc16_sat16_roundPetar Jovanovic2013-07-291-5/+11
* target-mips: fix branch in likely delay slot tcg assertJames Hogan2013-07-281-45/+17
* target-mips: fix multiplication in mipsdsp_rndq15_mul_q15_q15Petar Jovanovic2013-07-281-2/+2
* cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber2013-07-274-2/+15
* gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber2013-07-271-14/+17
* target-mips: Move cpu_gdb_{read,write}_register()Andreas Färber2013-07-261-0/+144
* cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber2013-07-261-0/+2
* cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber2013-07-233-3/+10
* cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber2013-07-231-4/+7
* cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber2013-07-232-7/+11
* cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()Andreas Färber2013-07-231-0/+14
* cpu: Move reset logging to CPUStateAndreas Färber2013-07-091-5/+0
* log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber2013-07-092-2/+2
* target-mips: Change gen_intermediate_code_internal() argument to MIPSCPUAndreas Färber2013-07-091-4/+5
* cpu: Make first_cpu and next_cpu CPUStateAndreas Färber2013-07-091-13/+12
* cpu: Drop unnecessary dynamic casts in *_env_get_cpu()Andreas Färber2013-07-091-1/+1
* linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-userPeter Maydell2013-07-091-13/+0
* cpu: Turn cpu_unassigned_access() into a CPUState hookAndreas Färber2013-06-283-6/+13
* cpu: Change qemu_init_vcpu() argument to CPUStateAndreas Färber2013-06-281-1/+0
* cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber2013-06-283-2/+7
* linux-user: Save the correct resume address for MIPS signal handlingKwok Cheung Yeung2013-05-202-2/+3
* target-mips: clean-up in BIT_INSVPetar Jovanovic2013-05-201-10/+6
* target-mips: set carry bit correctly in DSPControl registerPetar Jovanovic2013-05-191-3/+4
* target-mips: fix EXTPDP and setting up pos field in the DSPControl regPetar Jovanovic2013-05-191-5/+5
* target-mips: fix incorrect behaviour for EXTPPetar Jovanovic2013-05-171-2/+1
* target-mips: fix incorrect behaviour for INSVPetar Jovanovic2013-05-081-2/+2
* target-mips: add missing check_dspr2 for multiply instructionsPetar Jovanovic2013-05-081-0/+1
* target-mips: fix calculation of overflow for SHLL.PH and SHLL.QBPetar Jovanovic2013-05-031-24/+6
* target-mips: fix mipsdsp_mul_q15_q15 and tests for MAQ_SA_W_PHL/PHRPetar Jovanovic2013-04-151-13/+1
* target-mips: fix rndrashift_short_acc and code for EXTR_ instructionsPetar Jovanovic2013-03-171-14/+9
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-124-3/+7
* cpu: Pass CPUState to cpu_interrupt()Andreas Färber2013-03-121-4/+4
* exec: Pass CPUState to cpu_reset_interrupt()Andreas Färber2013-03-121-3/+2
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-123-7/+11
* mips64-linux-user: Enable 64-bit address mode and fpuRichard Henderson2013-03-051-0/+12
* mips-linux-user: Save and restore fpu and dsp from sigcontextRichard Henderson2013-03-052-3/+16
* target-mips: Fix accumulator selection for MIPS16 and microMIPSRichard Sandiford2013-03-051-84/+64
* target-mips: fix DSP overflow macro and affected routinesPetar Jovanovic2013-03-041-42/+48
* gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell2013-03-031-2/+2
* cpu: Introduce ENV_OFFSET macrosAndreas Färber2013-03-031-0/+1
* target-mips: fix for sign-issue in MULQ_W helperPetar Jovanovic2013-02-231-1/+1
* target-mips: fix for incorrect multiplication with MULQ_S.PHPetar Jovanovic2013-02-231-1/+1
* target-mips: Use mul[us]2 in [D]MULT[U] insnsRichard Henderson2013-02-233-42/+20
* cpu: Add CPUArchState pointer to CPUStateAndreas Färber2013-02-161-0/+2
* target-mips: Move TCG initialization to MIPSCPU initfnAndreas Färber2013-02-163-2/+6
* target-mips: Introduce QOM realizefn for MIPSCPUAndreas Färber2013-02-163-2/+20
* target-mips: enable access to DSP ASE if implementedPetar Jovanovic2013-01-311-4/+2
* target-mips: Unfuse {,N}M{ADD,SUB}.fmtRichard Sandiford2013-01-311-8/+17
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