| Commit message (Expand) | Author | Age | Files | Lines |
* | Fix ARM conditional branch bug. | pbrook | 2008-05-24 | 1 | -24/+24 |
* | Swithc some MIPS CP0 accesses to TCG. | ths | 2008-05-23 | 2 | -451/+194 |
* | Switch MIPS movf/movt to TCG. | ths | 2008-05-23 | 2 | -23/+22 |
* | Fix build failure for MIPS64 targets on 64-bit hosts. | ths | 2008-05-23 | 1 | -1/+2 |
* | Delete dead code. | ths | 2008-05-22 | 2 | -31/+0 |
* | Switch MIPS branch handling to TCG, and clean out pointless wrapper | ths | 2008-05-22 | 2 | -450/+286 |
* | Switch MIPS clo/clz and the condition tests to TCG. | ths | 2008-05-21 | 4 | -74/+80 |
* | Switch MIPS movn/movz to TCG. | ths | 2008-05-21 | 2 | -16/+14 |
* | Add file left out from previous commit. | ths | 2008-05-18 | 1 | -0/+3 |
* | Switch most MIPS logical and arithmetic instructions to TCG. | ths | 2008-05-18 | 4 | -577/+436 |
* | Fix local register cache handling. | ths | 2008-05-18 | 1 | -4/+13 |
* | fixed do_restore_state() | bellard | 2008-05-10 | 1 | -5/+7 |
* | Be more economical with local temporaries. | ths | 2008-05-07 | 1 | -2/+44 |
* | Mention missing CPU save/restore. | ths | 2008-05-07 | 1 | -0/+1 |
* | Delete redundant prototype. | ths | 2008-05-07 | 1 | -2/+0 |
* | Delete more obsolete dyngen ops. | ths | 2008-05-07 | 1 | -115/+0 |
* | Delete obsolete MIPS dyngen ops. | ths | 2008-05-07 | 2 | -156/+0 |
* | Convert some MIPS load/store instructions to TCG. | ths | 2008-05-06 | 3 | -109/+175 |
* | Enable 64-bit FPU only for NewABI. Spotted by Vince Weaver. | ths | 2008-05-06 | 1 | -0/+2 |
* | Use TCG for MIPS GPR moves. | ths | 2008-05-06 | 4 | -42/+83 |
* | Fix MIPS64 branches. Funny how this survived testing. | ths | 2008-05-06 | 1 | -1/+1 |
* | Really really revert commit r4343 | aurel32 | 2008-05-05 | 1 | -0/+4 |
* | Really revert commit r4343 | aurel32 | 2008-05-05 | 1 | -2/+0 |
* | Don't stop translation for mtc0 compare | aurel32 | 2008-05-05 | 1 | -2/+0 |
* | remove target ifdefs from vl.c | aurel32 | 2008-05-04 | 1 | -0/+22 |
* | Simplify mips branch handling. Retire T2 from use. Use TCG for branches. | ths | 2008-05-04 | 5 | -77/+55 |
* | Fix MIPS MT GPR accesses, thanks Stefan Weil. | ths | 2008-05-03 | 2 | -10/+10 |
* | Factorize code in translate.c | aurel32 | 2008-04-28 | 1 | -0/+8 |
* | Remove osdep.c/qemu-img code duplication | aurel32 | 2008-04-11 | 1 | -0/+1 |
* | Fix infinite loop when invalidating TLB, by Herve Poussineau. | ths | 2008-03-29 | 1 | -1/+1 |
* | Make MIPS MT implementation more cache friendly. | ths | 2008-02-12 | 5 | -59/+59 |
* | use the TCG code generator | bellard | 2008-02-01 | 2 | -55/+6 |
* | Fix typo which broke MIPS32R2 64-bit FPU support. | ths | 2008-01-09 | 1 | -1/+1 |
* | Fix broken absoluteness check for cabs.d.*. | ths | 2008-01-08 | 1 | -2/+2 |
* | Handle some more exception types. | ths | 2008-01-04 | 1 | -29/+43 |
* | Fix exception debug output. | ths | 2008-01-03 | 1 | -39/+36 |
* | MIPS COP1X (and related) instructions, by Richard Sandiford. | ths | 2007-12-30 | 3 | -18/+74 |
* | Set FCR0.F64 for MIPS64R2-generic, by Richard Sandiford. | ths | 2007-12-28 | 1 | -3/+3 |
* | De-cruft exception definitions, and implement nicer debug output. | ths | 2007-12-26 | 2 | -26/+65 |
* | Support for VR5432, and some of its special instructions. Original patch | ths | 2007-12-25 | 6 | -7/+405 |
* | 5K and 20K are Release 1 CPUs. | ths | 2007-12-25 | 1 | -3/+3 |
* | Avoid host FPE for overflowing division on MIPS, by Richard Sandiford. | ths | 2007-12-25 | 1 | -3/+10 |
* | Improved PABITS handling, and config register fixes. | ths | 2007-12-25 | 4 | -56/+106 |
* | Update debug code to match new accumulator register layout. | ths | 2007-12-24 | 1 | -4/+4 |
* | Fix CCRes value for 20Kc. | ths | 2007-12-24 | 1 | -1/+1 |
* | MIPS TODO: mention unimplemented system controllers. | ths | 2007-12-17 | 1 | -0/+2 |
* | Update MIPS TODO. The mipsnet failure is caused by a kernel bug. | ths | 2007-12-17 | 1 | -6/+0 |
* | Handle cpu_model in copy_cpu(), by Kirill A. Shutemov. | ths | 2007-12-09 | 1 | -0/+1 |
* | Larger physical address space for 32-bit MIPS. | ths | 2007-12-02 | 1 | -0/+3 |
* | Micro-optimize back-to-back store-load sequences. | ths | 2007-11-26 | 1 | -103/+135 |