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* Remove cpu_get_phys_page_debug from userspace emulationPaul Brook2010-03-121-4/+2
* Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson2010-03-121-0/+4
* target-mips: use newer logical opsAurelien Jarno2010-03-041-8/+4
* target-mips: use setcond when possibleAurelien Jarno2010-03-021-77/+20
* target-mips: fix ROTR and DROTR by zeroNathan Froyd2010-02-231-0/+4
* target-mips: fix CpU exception for coprocessor 0Nathan Froyd2010-02-231-1/+1
* target-mips: remove useless sign extensionAurelien Jarno2010-02-231-2/+0
* target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno2010-02-063-8/+22
* kill regs_to_env and env_to_regsPaolo Bonzini2010-01-191-8/+0
* target-mips: No MIPS16 support for 4Kc, 4KEc coresStefan Weil2009-12-171-3/+3
* target-mips: 4Kc, 4KEc cores do not support MIPS16Stefan Weil2009-12-161-3/+3
* target-mips: fix user-mode emulation startupNathan Froyd2009-12-132-8/+8
* target-mips: set Config1.CA for MIPS16-aware CPUsNathan Froyd2009-12-131-9/+18
* target-mips: add copyright notice for mips16 workNathan Froyd2009-12-132-1/+1
* target-mips: add mips16 instruction decodingNathan Froyd2009-12-131-9/+1063
* target-mips: add enums for MIPS16 opcodesNathan Froyd2009-12-131-0/+112
* target-mips: split out delay slot handlingNathan Froyd2009-12-131-55/+79
* target-mips: add gen_base_offset_addrNathan Froyd2009-12-131-24/+16
* target-mips: make gen_compute_branch 16/32-bit-awareNathan Froyd2009-12-131-7/+8
* target-mips: move ROTR and ROTRV inside gen_shift_{imm, }Nathan Froyd2009-12-131-139/+148
* target-mips: change interrupt bits to be mips16-awareNathan Froyd2009-12-132-24/+44
* target-mips: add new HFLAGs for JALX and 16/32-bit delay slotsNathan Froyd2009-12-131-19/+28
* target-mips: use physical address in lladdrAurelien Jarno2009-11-303-28/+61
* target-mips: add a function to do virtual -> physical translationsAurelien Jarno2009-11-302-0/+25
* target-mips: split code raising MMU exception in a separate functionAurelien Jarno2009-11-301-46/+53
* target-mips: factorize load/store code in op_helper.cAurelien Jarno2009-11-301-152/+100
* target-mips: fix physical address type in MMU functionsAurelien Jarno2009-11-222-11/+11
* target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno2009-11-225-4/+49
* target-mips: rename CP0_LLAddr into lladdrAurelien Jarno2009-11-224-16/+16
* target-mips: fix indentationAurelien Jarno2009-11-142-3/+3
* mips: fix cpu_reset memory leakBlue Swirl2009-11-143-56/+54
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-015-27/+28
* Get rid of _t suffixmalc2009-10-015-28/+27
* target-mips: make sure constants are in the second argumentAurelien Jarno2009-09-301-7/+7
* mips: Fix spelling in commentStefan Weil2009-09-301-2/+2
* target-mips: unmatched brackets in if 0Michael S. Tsirkin2009-09-301-1/+0
* target-mips: log instructions start in TCG codeAurelien Jarno2009-09-281-0/+4
* target-mips: remove MAX_OP_PER_INSTR workaroundAurelien Jarno2009-09-231-2/+1
* Add 'static' to please SparseBlue Swirl2009-09-211-1/+1
* target-mips: fix single-steppingNathan Froyd2009-09-141-3/+18
* Fix sys-queue.h conflict for goodBlue Swirl2009-09-121-2/+2
* target-mips: fix conditional moves off fp condition codesNathan Froyd2009-08-251-5/+5
* cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd2009-08-241-0/+1
* rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela2009-07-271-1/+1
* change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}Juan Quintela2009-07-271-1/+1
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-164-8/+4
* target-mips: remove useless code in gen_st_cond()Aurelien Jarno2009-07-121-1/+0
* Fix MIPS SCPaul Brook2009-07-121-2/+2
* MIPS atomic instructionsPaul Brook2009-07-092-24/+64
* MIPS usermode TLS registerPaul Brook2009-07-091-0/+5
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