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target-mips
Commit message (
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Author
Age
Files
Lines
*
Hardware convenience library
Paul Brook
2009-05-19
1
-3
/
+0
*
Include assert.h from qemu-common.h
Paul Brook
2009-05-13
1
-1
/
+0
*
Replace gcc variadic macro extension with C99 version
Blue Swirl
2009-05-13
1
-3
/
+3
*
target-mips: proper sign extension for 'SUBU rd, zero, rt'
Aurelien Jarno
2009-05-04
1
-0
/
+1
*
target-mips: fix comments about SUB/DSUB
Aurelien Jarno
2009-05-04
1
-2
/
+2
*
qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
aliguori
2009-04-24
1
-0
/
+1
*
qemu: per-arch cpu_has_work (Marcelo Tosatti)
aliguori
2009-04-24
1
-2
/
+8
*
Enable access to SYNCI_Step register in usermode emulation.
pbrook
2009-04-20
1
-0
/
+2
*
Revert "target-mips: fix call to check_*() functions"
aurel32
2009-04-17
1
-24
/
+12
*
target-mips: simplify exception generation
aurel32
2009-04-17
1
-4
/
+0
*
target-mips: fix revision r7126
aurel32
2009-04-16
1
-1
/
+1
*
target-mips: fix call to check_*() functions
aurel32
2009-04-16
1
-12
/
+24
*
target-mips: optimize gen_flt3_ldst()
aurel32
2009-04-16
1
-4
/
+4
*
target-mips: optimize gen_flt_ldst()
aurel32
2009-04-16
1
-4
/
+2
*
Stop translation after a syscall instruciton.
pbrook
2009-04-16
1
-0
/
+1
*
target-mips: mark zero register as unused.
aurel32
2009-04-15
1
-0
/
+1
*
target-mips: variable names consistency
aurel32
2009-04-15
2
-766
/
+768
*
target-mips: fix commits 7040 and 7042
aurel32
2009-04-13
1
-2
/
+6
*
target-mips: fix commit 7046
aurel32
2009-04-12
1
-2
/
+2
*
target-mips: don't map zero register as a TCG global
aurel32
2009-04-11
1
-1
/
+1
*
target-mips: optimize gen_ldst()
aurel32
2009-04-11
1
-22
/
+64
*
target-mips: optimize gen_arith_imm()
aurel32
2009-04-11
1
-106
/
+161
*
target-mips: fix commit r7076
aurel32
2009-04-10
1
-2
/
+1
*
target-mips: optimize gen_movcf_d()
aurel32
2009-04-10
1
-1
/
+1
*
target-mips: optimize a few tcg_temp_free()
aurel32
2009-04-10
1
-3
/
+3
*
target-mips: optimize gen_farith()
aurel32
2009-04-08
1
-56
/
+47
*
target-mips: optimize gen_flt3_arith()
aurel32
2009-04-08
1
-18
/
+16
*
target-mips: optimize gen_flt3_ldst()
aurel32
2009-04-08
1
-9
/
+4
*
target-mips: optimize gen_arith()
aurel32
2009-04-08
1
-158
/
+290
*
target-mips: optimize decode_opc()
aurel32
2009-04-08
1
-13
/
+17
*
target-mips: optimize gen_cp1()
aurel32
2009-04-08
1
-15
/
+5
*
target-mips: optimize gen_cp0()
aurel32
2009-04-08
1
-27
/
+5
*
target-mips: use the TCG_CALL_PURE and TCG_CALL_CONST for some helpers
aurel32
2009-04-06
1
-4
/
+4
*
Add new command line option -singlestep for tcg single stepping.
aurel32
2009-04-05
1
-4
/
+3
*
target-mips: optimize gen_movcf_*()
aurel32
2009-03-29
1
-51
/
+23
*
target-mips: optimize gen_movci()
aurel32
2009-03-29
1
-15
/
+17
*
target-mips: optimize gen_compute_branch1()
aurel32
2009-03-29
1
-107
/
+57
*
target-mips: don't map FP registers as TCG global variables
aurel32
2009-03-29
1
-35
/
+30
*
target-mips: fix divu instruction
aurel32
2009-03-29
1
-0
/
+2
*
target-mips: optimize write to env->hflags
aurel32
2009-03-29
1
-14
/
+7
*
target-mips: optimize gen_muldiv()
aurel32
2009-03-29
1
-123
/
+115
*
target-mips: optimize gen_HILO()
aurel32
2009-03-29
1
-4
/
+0
*
target-mips: optimize gen_trap()
aurel32
2009-03-29
1
-26
/
+12
*
target-mips: optimize gen_compute_branch()
aurel32
2009-03-29
3
-51
/
+48
*
target-mips: don't mix result and arguments in gen_op_*
aurel32
2009-03-29
1
-54
/
+54
*
target-mips: gen_bshfl()
aurel32
2009-03-29
1
-29
/
+45
*
target-mips: optimize gen_mul_vr54xx()
aurel32
2009-03-29
1
-2
/
+2
*
target-mips: optimize gen_cl()
aurel32
2009-03-29
1
-15
/
+11
*
target-mips: fix FPU in 64-bit mode
aurel32
2009-03-28
1
-17
/
+8
*
target-mips: implement FPU Flush-To-Zero mode
aurel32
2009-03-28
1
-0
/
+5
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