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* target-mips: add MAAR, MAARI registerYongbok Kim2019-11-296-3/+113
* target-mips: use CP0_CHECK for gen_m{f|t}hc0Yongbok Kim2019-11-291-25/+21
* target-mips: make ITC Configuration Tags accessible to the CPULeon Alrae2019-11-294-12/+100
* target-mips: check CP0 enabled for CACHE instruction also in R6Leon Alrae2019-11-291-0/+1
* hw/mips: implement ITC Configuration Tags and Storage CellsLeon Alrae2019-11-291-0/+1
* target-mips: enable CM GCR in MIPS64R6-generic CPULeon Alrae2019-11-291-1/+2
* hw/mips_malta: add CPS to Malta boardLeon Alrae2019-11-292-0/+11
* target-mips: add CMGCRBase registerYongbok Kim2019-11-292-1/+20
* target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUsLeon Alrae2019-11-293-9/+17
* include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster2019-11-291-0/+1
* tcg: Add type for vCPU pointersLluís Vilanova2019-11-291-1/+1
* target-mips: implement R6 multi-threadingYongbok Kim2019-11-296-1/+147
* mips/kvm: Support MSA in MIPS KVM guestsJames Hogan2019-11-291-20/+109
* mips/kvm: Support FPU in MIPS KVM guestsJames Hogan2019-11-291-4/+117
* mips/kvm: Support signed 64-bit KVM registersJames Hogan2019-11-291-9/+31
* mips/kvm: Support unsigned KVM registersJames Hogan2019-11-291-0/+22
* mips/kvm: Implement Config CP0 registersJames Hogan2019-11-291-0/+106
* mips/kvm: Implement PRid CP0 registerJames Hogan2019-11-291-0/+11
* mips/kvm: Remove a couple of noisy DPRINTFsJames Hogan2019-11-291-2/+0
* all: Clean up includesPeter Maydell2019-11-291-1/+0
* target-mips: Stop using uint_fast*_t types in r4k_tlb_t structPeter Maydell2019-11-291-13/+13
* tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson2019-11-291-12/+13
* log: do not unnecessarily include qom/cpu.hPaolo Bonzini2019-11-292-0/+2
* mips: Clean up includesPeter Maydell2019-11-2911-9/+11
* target-mips: Fix ALIGN instruction when bp=0Miodrag Dinic2019-11-291-1/+10
* target-mips: silence NaNs for cvt.s.d and cvt.d.sAurelien Jarno2019-11-291-0/+2
* target-mips/cpu.h: Fix spell errorDongxue Zhang2019-11-291-1/+1
* fpu: Replace int32 typedef with int32_tPeter Maydell2019-11-291-12/+12
* fpu: Replace uint64 typedef with uint64_tPeter Maydell2019-11-291-2/+2
* fpu: Replace int64 typedef with int64_tPeter Maydell2019-11-291-6/+6
* target-mips: flush QEMU TLB when disabling 64-bit addressingLeon Alrae2015-11-242-14/+17
* target-mips: Fix exceptions while UX=0James Hogan2015-11-241-0/+12
* target-mips: fix updating XContext on mmu exceptionYongbok Kim2015-10-301-3/+4
* target-mips: add SIGRIE instructionYongbok Kim2015-10-301-1/+11
* target-mips: Set Config5.XNP for R6 coresYongbok Kim2015-10-301-2/+2
* target-mips: add PC, XNP reg numbers to RDHWRYongbok Kim2015-10-304-32/+63
* target-mips: Add enum for BREAK32Yongbok Kim2015-10-291-1/+2
* target-mips: update writing to CP0.Status.KX/SX/UX in MIPS Release R6Leon Alrae2015-10-291-1/+6
* target-mips: implement the CPU wake-up on non-enabled interrupts in R6Leon Alrae2015-10-291-3/+4
* target-mips: move the test for enabled interrupts to a separate functionLeon Alrae2015-10-293-16/+20
* target-*: Advance pc after recognizing a breakpointRichard Henderson2015-10-281-2/+4
* disas: QOMify mips specific disas setupPeter Crosthwaite2015-10-221-0/+9
* kvm: Pass PCI device pointer to MSI routing functionsPavel Fedin2015-10-191-1/+1
* qdev: Protect device-list-properties against broken devicesMarkus Armbruster2015-10-091-0/+7
* tcg: Remove gen_intermediate_code_pcRichard Henderson2015-10-071-43/+5
* tcg: Pass data argument to restore_state_to_opcRichard Henderson2015-10-071-4/+5
* tcg: Add TCG_MAX_INSNSRichard Henderson2015-10-071-1/+6
* target-*: Drop cpu_gen_code defineRichard Henderson2015-10-071-1/+0
* target-mips: Add delayed branch state to insn_startRichard Henderson2015-10-072-1/+3
* target-*: Introduce and use cpu_breakpoint_testRichard Henderson2015-10-071-15/+10
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