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* mips: more fixes to the MIPS interrupt glue logicAurelien Jarno2010-07-254-15/+21
* mips: Correct MIPS interrupt glue logic for icountEdgar E. Iglesias2010-07-242-14/+0
* target-mips: fix xtlb exception for loongsonAurelien Jarno2010-07-171-2/+4
* target-mips: add loongson 2E & 2F integer instructionsAurelien Jarno2010-07-111-0/+271
* remove exec-all.h inclusion from cpu.hPaolo Bonzini2010-07-031-1/+0
* move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini2010-07-032-7/+7
* remove unused stuff from */exec.hPaolo Bonzini2010-07-032-9/+6
* target-mips: add Loongson support prefetchAurelien Jarno2010-07-011-35/+43
* target-mips: split load and storeAurelien Jarno2010-07-011-155/+183
* target-mips: fix DINSU instructionAurelien Jarno2010-06-301-1/+1
* target-mips: enable movn/movz on loongson 2E & 2FAurelien Jarno2010-06-291-1/+2
* MIPS: Initial support of fulong mini pc (CPU definition)Huacai Chen2010-06-292-0/+39
* target-mips: Fix compilationStefan Weil2010-06-091-1/+1
* target-mips: add microMIPS exception handler supportNathan Froyd2010-06-092-6/+16
* target-mips: microMIPS ASE supportNathan Froyd2010-06-094-5/+2531
* target-mips: mips16 cleanupsNathan Froyd2010-06-091-7/+17
* target-mips: refactor c{, abs}.cond.fmt insnsNathan Froyd2010-06-091-83/+81
* target-mips: move FP FMT comments closer to the definitionsAurelien Jarno2010-06-091-14/+14
* target-mips: define constants for magic numbersNathan Froyd2010-06-091-142/+295
* target-mips: break out [ls][wd]c1 and rdhwr insn generationNathan Froyd2010-06-081-47/+59
* target-mips: Remove duplicate CPU log.Richard Henderson2010-05-051-6/+0
* target-mips: Fix format specifiers for fpu_fprintfStefan Weil2010-04-091-14/+20
* target-mips: Fix one more format specifier for cpu_fprintfStefan Weil2010-04-081-1/+3
* remove TARGET_* defines from translate-all.cPaolo Bonzini2010-04-081-0/+2
* Large page TLB flushPaul Brook2010-03-171-3/+4
* target-mips: update address space definitionsAurelien Jarno2010-03-131-4/+4
* Target specific usermode cleanupPaul Brook2010-03-122-2/+14
* Remove cpu_get_phys_page_debug from userspace emulationPaul Brook2010-03-121-4/+2
* Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson2010-03-121-0/+4
* target-mips: use newer logical opsAurelien Jarno2010-03-041-8/+4
* target-mips: use setcond when possibleAurelien Jarno2010-03-021-77/+20
* target-mips: fix ROTR and DROTR by zeroNathan Froyd2010-02-231-0/+4
* target-mips: fix CpU exception for coprocessor 0Nathan Froyd2010-02-231-1/+1
* target-mips: remove useless sign extensionAurelien Jarno2010-02-231-2/+0
* target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno2010-02-063-8/+22
* kill regs_to_env and env_to_regsPaolo Bonzini2010-01-191-8/+0
* target-mips: No MIPS16 support for 4Kc, 4KEc coresStefan Weil2009-12-171-3/+3
* target-mips: 4Kc, 4KEc cores do not support MIPS16Stefan Weil2009-12-161-3/+3
* target-mips: fix user-mode emulation startupNathan Froyd2009-12-132-8/+8
* target-mips: set Config1.CA for MIPS16-aware CPUsNathan Froyd2009-12-131-9/+18
* target-mips: add copyright notice for mips16 workNathan Froyd2009-12-132-1/+1
* target-mips: add mips16 instruction decodingNathan Froyd2009-12-131-9/+1063
* target-mips: add enums for MIPS16 opcodesNathan Froyd2009-12-131-0/+112
* target-mips: split out delay slot handlingNathan Froyd2009-12-131-55/+79
* target-mips: add gen_base_offset_addrNathan Froyd2009-12-131-24/+16
* target-mips: make gen_compute_branch 16/32-bit-awareNathan Froyd2009-12-131-7/+8
* target-mips: move ROTR and ROTRV inside gen_shift_{imm, }Nathan Froyd2009-12-131-139/+148
* target-mips: change interrupt bits to be mips16-awareNathan Froyd2009-12-132-24/+44
* target-mips: add new HFLAGs for JALX and 16/32-bit delay slotsNathan Froyd2009-12-131-19/+28
* target-mips: use physical address in lladdrAurelien Jarno2009-11-303-28/+61
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