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* target-mips: No MIPS16 support for 4Kc, 4KEc coresStefan Weil2009-12-171-3/+3
| | | | | | | | | Fix regression introduced by d19954f46dfc262612c30e9534e660e953049487. 4Kc and 4KEc don't support MIPS16. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: 4Kc, 4KEc cores do not support MIPS16Stefan Weil2009-12-161-3/+3
| | | | | | | | | | | 4Kc, 4KEc cores do not support MIPS16, so not only the CP0_Config1 had to be fixed (see previous patch), but also MIPS16 instructions must not be executed. (Hint from Nathan Froyd, thanks). Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix user-mode emulation startupNathan Froyd2009-12-131-8/+0
| | | | | | | | | | | | | | | Running programs with the MIPS user-mode emulator fails during dynamic loading, as floating-point instructions are not enabled in in env->hflags. Move the code for doing so from fpu_init to cpu_reset so the MIPS_HFLAG_{FPU,F64} setting doesn't get clobbered by cpu_reset setting env->hflags to MIPS_HFLAG_UM. The same end can be achieved by swapping the ordering of fpu_init and cpu_reset in cpu_mips_init, but it seemed better to consolidate the CONFIG_USER_ONLY code into a single location. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: set Config1.CA for MIPS16-aware CPUsNathan Froyd2009-12-131-9/+18
| | | | | Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno2009-11-221-0/+32
| | | | | | | | Depending on the CPU, CP0_LLAddr is either read-only or read-write, and the returned value can be shifted by a variable amount of bits. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
* mips: fix cpu_reset memory leakBlue Swirl2009-11-141-50/+0
| | | | | | | | | Remove cpu_mips_register() - move mmu_init(), fpu_init() and mvp_init() into cpu_mips_init() - move the other parts in cpu_mips_init() Reported-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-011-10/+10
| | | | | | | | | | | | In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Get rid of _t suffixmalc2009-10-011-10/+10
| | | | | | | Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: rename helpers from do_ to helper_aurel322009-03-081-4/+4
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6773 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: fix indentationaurel322009-01-141-42/+42
| | | | | | | | Remove all tabs from target-mips/* Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6306 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: get rid of tests on env->user_mode_onlyaurel322009-01-121-10/+10
| | | | | | | | | Replace runtime checks on env->user_mode_only by compile time checks on CONFIG_USER_ONLY. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6276 c046a42c-6fe2-441c-8c8c-71466251a162
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
| | | | | | | | | | The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
* Use the ARRAY_SIZE() macro where appropriate.malc2008-12-221-2/+2
| | | | | | | | | Change from v1: Avoid changing the existing coding style in certain files. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
* Move the active FPU registers into env again, and use more TCG registersths2008-09-181-3/+6
| | | | | | | | | to access them. Signed-off-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: fix warningaurel322008-09-141-1/+1
| | | | | | | | | Attached patch fixes a warning in cpu_mips_find_by_name(). 'name' is a string, so it should be declared as char*, not unsigned char*. (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5213 c046a42c-6fe2-441c-8c8c-71466251a162
* Build fix for gcc-3.3.ths2008-09-021-0/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5139 c046a42c-6fe2-441c-8c8c-71466251a162
* Less hardcoding of TARGET_USER_ONLY.ths2008-07-231-15/+12
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4928 c046a42c-6fe2-441c-8c8c-71466251a162
* A bunch of minor code improvements in the MIPS target.ths2008-07-211-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4921 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix compiler warning, by Stefan Weil.ths2008-07-201-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4915 c046a42c-6fe2-441c-8c8c-71466251a162
* More efficient target register / TC accesses.ths2008-06-271-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4794 c046a42c-6fe2-441c-8c8c-71466251a162
* Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford.ths2008-05-281-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4604 c046a42c-6fe2-441c-8c8c-71466251a162
* Enable 64-bit FPU only for NewABI. Spotted by Vince Weaver.ths2008-05-061-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4368 c046a42c-6fe2-441c-8c8c-71466251a162
* Use TCG for MIPS GPR moves.ths2008-05-061-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4356 c046a42c-6fe2-441c-8c8c-71466251a162
* Set FCR0.F64 for MIPS64R2-generic, by Richard Sandiford.ths2007-12-281-3/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3865 c046a42c-6fe2-441c-8c8c-71466251a162
* Support for VR5432, and some of its special instructions. Original patchths2007-12-251-0/+16
| | | | | | | by Dirk Behme. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3859 c046a42c-6fe2-441c-8c8c-71466251a162
* 5K and 20K are Release 1 CPUs.ths2007-12-251-3/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3858 c046a42c-6fe2-441c-8c8c-71466251a162
* Improved PABITS handling, and config register fixes.ths2007-12-251-50/+99
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3855 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix CCRes value for 20Kc.ths2007-12-241-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3849 c046a42c-6fe2-441c-8c8c-71466251a162
* Add older 4Km variants.ths2007-11-191-0/+34
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3708 c046a42c-6fe2-441c-8c8c-71466251a162
* Use a valid PRid.ths2007-11-181-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3685 c046a42c-6fe2-441c-8c8c-71466251a162
* Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSPths2007-11-141-2/+19
| | | | | | | flags. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3637 c046a42c-6fe2-441c-8c8c-71466251a162
* added cpu_model parameter to cpu_init()bellard2007-11-101-22/+11
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
* Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths2007-11-081-2/+2
| | | | | | | defines for linux-user. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3556 c046a42c-6fe2-441c-8c8c-71466251a162
* Preliminary MIPS64R2 mode.ths2007-10-291-0/+21
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3479 c046a42c-6fe2-441c-8c8c-71466251a162
* Use the standard ASE check for MIPS-3D and MT.ths2007-10-231-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
* Code provision for n32/n64 mips userland emulation. Not functional yet.ths2007-09-301-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
* Supervisor mode implementation, by Aurelien Jarno.ths2007-09-291-3/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3267 c046a42c-6fe2-441c-8c8c-71466251a162
* Per-CPU instruction decoding implementation, by Aurelien Jarno.ths2007-09-241-1/+13
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix mips usermode emulation.ths2007-09-231-0/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3212 c046a42c-6fe2-441c-8c8c-71466251a162
* Partial support for 34K multithreading, not functional yet.ths2007-09-061-53/+158
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
* Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.ths2007-08-261-7/+9
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3146 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix MIPS cache configuration, by Aurelien Jarno.ths2007-07-291-11/+19
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3092 c046a42c-6fe2-441c-8c8c-71466251a162
* Handle MIPS64 SEGBITS value correctly.ths2007-06-231-0/+14
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
* Allow emulation of 32bit targets in the MIPS64 capable qemu version.ths2007-06-221-2/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3007 c046a42c-6fe2-441c-8c8c-71466251a162
* Change 20Kc PRID to a later version.ths2007-06-121-1/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2980 c046a42c-6fe2-441c-8c8c-71466251a162
* R5k has PX implemented.ths2007-06-091-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2963 c046a42c-6fe2-441c-8c8c-71466251a162
* Update some comments, 64bit FPU support is functional regardless ofths2007-06-011-4/+7
| | | | | | | funny non-standard fcr0 bits on earlier CPUs. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2919 c046a42c-6fe2-441c-8c8c-71466251a162
* Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno.ths2007-06-011-2/+50
| | | | | | | | | Note that the F64 flag isn't usable on any of those (and the R4000), so all our 64bit FPU goodness goes out of the window until a shadow capability flag is implemented. :-( git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2910 c046a42c-6fe2-441c-8c8c-71466251a162
* Allow again FPU for usermode emulation.ths2007-06-011-1/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2905 c046a42c-6fe2-441c-8c8c-71466251a162
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