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target-mips
/
translate.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
Update FSF address in GPL/LGPL boilerplate
aurel32
2009-01-04
1
-1
/
+1
*
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
aliguori
2008-11-25
1
-2
/
+2
*
Refactor and enhance break/watchpoint API (Jan Kiszka)
aliguori
2008-11-18
1
-3
/
+4
*
TCG variable type checking.
pbrook
2008-11-17
1
-1028
/
+988
*
target-mips: avoid tcg internal error in mfc0/dmfc0
aurel32
2008-11-15
1
-8
/
+11
*
Revert commits 5685 to 5688 committed by mistake
aurel32
2008-11-11
1
-0
/
+4
*
Don't stop translation for mtc0 compare
aurel32
2008-11-11
1
-4
/
+0
*
target-mips: gen_compute_branch1()
aurel32
2008-11-11
1
-81
/
+41
*
target-mips: optimize movc*()
aurel32
2008-11-11
1
-48
/
+33
*
target-mips: optimize gen_farith()
aurel32
2008-11-11
1
-12
/
+12
*
target-mips: optimize gen_muldiv()
aurel32
2008-11-11
1
-115
/
+47
*
target-mips: optimize gen_arith()/gen_arith_imm()
aurel32
2008-11-11
1
-46
/
+32
*
target-mips: convert bit shuffle ops to TCG
aurel32
2008-11-11
1
-50
/
+56
*
target-mips: convert bitfield ops to TCG
aurel32
2008-11-11
1
-16
/
+39
*
target-mips: optimize gen_op_addr_add() (2/2)
aurel32
2008-11-11
1
-9
/
+2
*
target-mips: optimize gen_op_addr_add() (1/2)
aurel32
2008-11-11
1
-10
/
+7
*
target-mips: optimize gen_save_pc()
aurel32
2008-11-11
1
-5
/
+1
*
target-mips: fix mft* helpers/call
aurel32
2008-11-11
1
-24
/
+24
*
target-mips: fix temporary variable freeing in op_ldst_##insn()
aurel32
2008-11-11
1
-1
/
+1
*
target-mips: use the new rotr/rotri instructions
aurel32
2008-11-04
1
-43
/
+5
*
Use concet TCG instructions in the MIPS target.
ths
2008-09-22
1
-24
/
+4
*
Add concat_i32_i64 op.
pbrook
2008-09-21
1
-17
/
+6
*
Use TCG registers for most CPU register accesses.
ths
2008-09-18
1
-17
/
+52
*
Move the active FPU registers into env again, and use more TCG registers
ths
2008-09-18
1
-40
/
+55
*
TCG fixes for target-mips
aurel32
2008-09-05
1
-26
/
+27
*
MIPS: don't free TCG temporary variable twice
aurel32
2008-08-23
1
-2
/
+0
*
Delete unused variable.
ths
2008-08-01
1
-1
/
+0
*
Less hardcoding of TARGET_USER_ONLY.
ths
2008-07-23
1
-51
/
+53
*
A bunch of minor code improvements in the MIPS target.
ths
2008-07-21
1
-20
/
+9
*
Fix logging output for MIPS HI, LO registers, by Stefan Weil.
ths
2008-07-21
1
-1
/
+2
*
Simplify conditional FP moves.
ths
2008-07-20
1
-10
/
+5
*
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
ths
2008-07-18
1
-7
/
+5
*
Use temporary registers for the MIPS FPU emulation.
ths
2008-07-09
1
-542
/
+1174
*
Fix typo in comment.
ths
2008-07-05
1
-1
/
+1
*
Static'ify some functions, and use standard inline in translate.c.
ths
2008-07-01
1
-22
/
+22
*
Delete duplicate code.
ths
2008-07-01
1
-3
/
+0
*
Spelling fixes, spotted by Stuart Brady.
ths
2008-06-30
1
-2
/
+2
*
Make bcond and btarget TCG registers.
ths
2008-06-30
1
-73
/
+43
*
Remove unnecessary helper arguments, and fix some typos.
ths
2008-06-29
1
-11
/
+21
*
Add missing file. Fix spelling errors.
pbrook
2008-06-29
1
-1
/
+0
*
Add instruction counter.
pbrook
2008-06-29
1
-0
/
+51
*
Avoid unused input arguments which triggered tcg errors. Spotted by
ths
2008-06-27
1
-6
/
+6
*
More efficient target register / TC accesses.
ths
2008-06-27
1
-63
/
+35
*
Remove remaining uses of T0 in the MIPS target.
ths
2008-06-24
1
-378
/
+400
*
T1 is now dead.
ths
2008-06-24
1
-4
/
+1
*
Reduce use of fixed registers a bit more.
ths
2008-06-24
1
-329
/
+356
*
Use temporaries instead of fixed registers for some instructions.
ths
2008-06-24
1
-293
/
+398
*
Pass T0/T1 explicitly to helper functions, and clean up a few dyngen
ths
2008-06-23
1
-405
/
+466
*
Convert unaligned load/store to TCG.
ths
2008-06-20
1
-39
/
+16
*
Convert vr54xx multiply instructions to TCG.
ths
2008-06-20
1
-14
/
+14
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