summaryrefslogtreecommitdiffstats
path: root/target-mips/translate.c
Commit message (Expand)AuthorAgeFilesLines
* TCG variable type checking.pbrook2008-11-171-1028/+988
* target-mips: avoid tcg internal error in mfc0/dmfc0aurel322008-11-151-8/+11
* Revert commits 5685 to 5688 committed by mistakeaurel322008-11-111-0/+4
* Don't stop translation for mtc0 compareaurel322008-11-111-4/+0
* target-mips: gen_compute_branch1()aurel322008-11-111-81/+41
* target-mips: optimize movc*()aurel322008-11-111-48/+33
* target-mips: optimize gen_farith()aurel322008-11-111-12/+12
* target-mips: optimize gen_muldiv()aurel322008-11-111-115/+47
* target-mips: optimize gen_arith()/gen_arith_imm()aurel322008-11-111-46/+32
* target-mips: convert bit shuffle ops to TCGaurel322008-11-111-50/+56
* target-mips: convert bitfield ops to TCGaurel322008-11-111-16/+39
* target-mips: optimize gen_op_addr_add() (2/2)aurel322008-11-111-9/+2
* target-mips: optimize gen_op_addr_add() (1/2)aurel322008-11-111-10/+7
* target-mips: optimize gen_save_pc()aurel322008-11-111-5/+1
* target-mips: fix mft* helpers/callaurel322008-11-111-24/+24
* target-mips: fix temporary variable freeing in op_ldst_##insn()aurel322008-11-111-1/+1
* target-mips: use the new rotr/rotri instructionsaurel322008-11-041-43/+5
* Use concet TCG instructions in the MIPS target.ths2008-09-221-24/+4
* Add concat_i32_i64 op.pbrook2008-09-211-17/+6
* Use TCG registers for most CPU register accesses.ths2008-09-181-17/+52
* Move the active FPU registers into env again, and use more TCG registersths2008-09-181-40/+55
* TCG fixes for target-mipsaurel322008-09-051-26/+27
* MIPS: don't free TCG temporary variable twiceaurel322008-08-231-2/+0
* Delete unused variable.ths2008-08-011-1/+0
* Less hardcoding of TARGET_USER_ONLY.ths2008-07-231-51/+53
* A bunch of minor code improvements in the MIPS target.ths2008-07-211-20/+9
* Fix logging output for MIPS HI, LO registers, by Stefan Weil.ths2008-07-211-1/+2
* Simplify conditional FP moves.ths2008-07-201-10/+5
* Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths2008-07-181-7/+5
* Use temporary registers for the MIPS FPU emulation.ths2008-07-091-542/+1174
* Fix typo in comment.ths2008-07-051-1/+1
* Static'ify some functions, and use standard inline in translate.c.ths2008-07-011-22/+22
* Delete duplicate code.ths2008-07-011-3/+0
* Spelling fixes, spotted by Stuart Brady.ths2008-06-301-2/+2
* Make bcond and btarget TCG registers.ths2008-06-301-73/+43
* Remove unnecessary helper arguments, and fix some typos.ths2008-06-291-11/+21
* Add missing file. Fix spelling errors.pbrook2008-06-291-1/+0
* Add instruction counter.pbrook2008-06-291-0/+51
* Avoid unused input arguments which triggered tcg errors. Spotted byths2008-06-271-6/+6
* More efficient target register / TC accesses.ths2008-06-271-63/+35
* Remove remaining uses of T0 in the MIPS target.ths2008-06-241-378/+400
* T1 is now dead.ths2008-06-241-4/+1
* Reduce use of fixed registers a bit more.ths2008-06-241-329/+356
* Use temporaries instead of fixed registers for some instructions.ths2008-06-241-293/+398
* Pass T0/T1 explicitly to helper functions, and clean up a few dyngenths2008-06-231-405/+466
* Convert unaligned load/store to TCG.ths2008-06-201-39/+16
* Convert vr54xx multiply instructions to TCG.ths2008-06-201-14/+14
* Convert remaining MIPS FP instructions to TCG.ths2008-06-191-71/+332
* Switch the standard multiplication instructions to TCG.ths2008-06-121-8/+152
* Switch bitfield instructions and assorted special ops to TCG.ths2008-06-121-45/+47
OpenPOWER on IntegriCloud