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path: root/target-mips/translate.c
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* target-mips: add SIGRIE instructionYongbok Kim2015-10-301-1/+11
* target-mips: add PC, XNP reg numbers to RDHWRYongbok Kim2015-10-301-3/+25
* target-mips: Add enum for BREAK32Yongbok Kim2015-10-291-1/+2
* target-*: Advance pc after recognizing a breakpointRichard Henderson2015-10-281-2/+4
* tcg: Remove gen_intermediate_code_pcRichard Henderson2015-10-071-43/+5
* tcg: Pass data argument to restore_state_to_opcRichard Henderson2015-10-071-4/+5
* tcg: Add TCG_MAX_INSNSRichard Henderson2015-10-071-1/+6
* target-mips: Add delayed branch state to insn_startRichard Henderson2015-10-071-1/+2
* target-*: Introduce and use cpu_breakpoint_testRichard Henderson2015-10-071-15/+10
* target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson2015-10-071-3/+2
* target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson2015-10-071-5/+4
* tcg: Rename debug_insn_start to insn_startRichard Henderson2015-10-071-1/+1
* target-mips: improve exception handlingPavel Dovgaluk2015-09-181-191/+174
* target-mips: correct MTC0 instruction on MIPS64Leon Alrae2015-09-181-11/+7
* target-mips: add missing restriction in DAUI instructionLeon Alrae2015-09-181-1/+3
* target-mips: get rid of MIPS_DEBUG_SIGN_EXTENSIONSAurelien Jarno2015-09-181-39/+0
* target-mips: get rid of MIPS_DEBUGAurelien Jarno2015-09-181-605/+19
* target-mips: remove wrong checks for recip.fmt and rsqrt.fmtPetar Jovanovic2015-09-181-4/+2
* target-mips: Use tcg_gen_extrh_i64_i32Richard Henderson2015-09-181-26/+22
* tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson2015-08-241-2/+2
* target-mips: simplify LWL/LDL mask generationAurelien Jarno2015-08-131-8/+6
* target-mips: Copy restrictions from ext/ins to dext/dinsRichard Henderson2015-08-041-20/+25
* target-mips: fix semihosting for microMIPS R6Leon Alrae2015-08-041-3/+7
* target-mips: fix page fault address for LWL/LWR/LDL/LDRAurelien Jarno2015-07-151-0/+12
* target-mips: fix logically dead code reported by CoverityLeon Alrae2015-07-151-0/+3
* target-mips: microMIPS32 R6 POOL16{A, C} instructionsYongbok Kim2015-06-261-15/+118
* target-mips: microMIPS32 R6 Major instructionsYongbok Kim2015-06-261-17/+45
* target-mips: microMIPS32 R6 POOL32{I, C} instructionsYongbok Kim2015-06-261-6/+21
* target-mips: microMIPS32 R6 POOL32F instructionsYongbok Kim2015-06-261-32/+199
* target-mips: microMIPS32 R6 POOL32A{XF} instructionsYongbok Kim2015-06-261-10/+72
* target-mips: microMIPS32 R6 branches and jumpsYongbok Kim2015-06-261-40/+202
* target-mips: add microMIPS32 R6 opcode enumYongbok Kim2015-06-261-16/+103
* target-mips: signal RI for removed instructions in microMIPS R6Yongbok Kim2015-06-261-0/+68
* target-mips: raise RI exceptions when FIR.PS = 0Yongbok Kim2015-06-261-33/+45
* target-mips: rearrange gen_compute_compact_branchYongbok Kim2015-06-261-236/+236
* target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAPYongbok Kim2015-06-261-67/+99
* target-mips: remove an unused argumentYongbok Kim2015-06-261-3/+2
* target-mips: add microMIPS TLBINV, TLBINVFYongbok Kim2015-06-261-0/+8
* target-mips: fix {RD, WR}PGPR in microMIPSYongbok Kim2015-06-261-2/+2
* target-mips: add Unified Hosting Interface (UHI) supportLeon Alrae2015-06-261-20/+55
* target-mips: remove identical code in different branchLeon Alrae2015-06-261-21/+4
* disas: Remove uses of CPU envPeter Crosthwaite2015-06-221-1/+1
* target-mips: add MTHC0 and MFHC0 instructionsLeon Alrae2015-06-121-0/+226
* target-mips: add CP0.PageGrain.ELPA supportLeon Alrae2015-06-121-1/+2
* target-mips: extend selected CP0 registers to 64-bits in MIPS32Leon Alrae2015-06-121-21/+42
* target-mips: correct MFC0 for CP0.EntryLo in MIPS64Leon Alrae2015-06-121-6/+6
* target-mips: add ERETNC instruction and Config5.LLB bitLeon Alrae2015-06-111-5/+15
* target-mips: Misaligned memory accesses for MSAYongbok Kim2015-06-111-10/+17
* target-mips: Misaligned memory accesses for R6Yongbok Kim2015-06-111-12/+27
* target-mips: add Config5.FRE support allowing Status.FR=0 emulationLeon Alrae2015-06-111-150/+158
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