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path: root/target-mips/translate.c
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* target-mips: allow microMIPS SWP and SDP to have RD equal to BASEEric Johnson2012-08-271-1/+9
* target-mips: add privilege level check to several Cop0 instructionsEric Johnson2012-08-271-0/+9
* mips-linux-user: Always support rdhwr.Richard Henderson2012-08-271-0/+4
* target-mips: Streamline indexed cp1 memory addressing.Richard Henderson2012-08-271-2/+1
* Fix order of CVT.PS.S operandsRichard Sandiford2012-08-271-1/+1
* Fix operands of RECIP2.S and RECIP2.PSRichard Sandiford2012-08-271-2/+2
* target-mips: Enable access to required RDHWR hardware registersMeador Inge2012-08-231-2/+3
* MIPS: Correct FCR0 initializationNathan Froyd2012-08-091-0/+1
* target-mips: Let cpu_mips_init() return MIPSCPUAndreas Färber2012-06-041-2/+2
* target-mips: Use cpu_reset() in cpu_mips_init()Andreas Färber2012-06-041-1/+1
* mips: Fix BC1ANY[24]F instructionsRichard Sandiford2012-05-191-4/+4
* target-mips: Start QOM'ifying CPU initAndreas Färber2012-04-301-1/+0
* target-mips: QOM'ify CPUAndreas Färber2012-04-301-1/+3
* target-mips: Don't overuse CPUStateAndreas Färber2012-03-141-178/+178
* Rename cpu_reset() to cpu_state_reset()Andreas Färber2012-03-141-2/+2
* target-mips: Clean includesStefan Weil2012-02-281-7/+0
* mips: Initialize MT state at resetEdgar E. Iglesias2011-09-061-0/+26
* mips: Hook in more reg accesses via mttr/mftrEdgar E. Iglesias2011-09-061-0/+86
* Use glib memory allocation and free functionsAnthony Liguori2011-08-201-1/+1
* Remove exec-all.h include directivesBlue Swirl2011-06-261-1/+0
* Remove unused function parameters from gen_pc_load and rename the functionStefan Weil2011-04-201-2/+1
* Fix conversions from pointer to tcg_target_longStefan Weil2011-04-101-1/+1
* target-mips: fix save_cpu_state() callsAurelien Jarno2011-01-241-6/+6
* mips: Break TBs after mfc0_countEdgar E. Iglesias2011-01-181-2/+6
* target-mips: fix translation of MT instructionsNathan Froyd2010-12-221-4/+4
* target-xxx: Use fprintf_function (format checking)Stefan Weil2010-10-301-7/+5
* mips: avoid write only variablesBlue Swirl2010-10-131-0/+29
* Correctly identify multiple cpus in SMP systemsHervé Poussineau2010-07-311-2/+1
* mips: more fixes to the MIPS interrupt glue logicAurelien Jarno2010-07-251-2/+10
* target-mips: add loongson 2E & 2F integer instructionsAurelien Jarno2010-07-111-0/+271
* target-mips: add Loongson support prefetchAurelien Jarno2010-07-011-35/+43
* target-mips: split load and storeAurelien Jarno2010-07-011-155/+183
* target-mips: fix DINSU instructionAurelien Jarno2010-06-301-1/+1
* target-mips: enable movn/movz on loongson 2E & 2FAurelien Jarno2010-06-291-1/+2
* target-mips: Fix compilationStefan Weil2010-06-091-1/+1
* target-mips: microMIPS ASE supportNathan Froyd2010-06-091-5/+2385
* target-mips: mips16 cleanupsNathan Froyd2010-06-091-7/+17
* target-mips: refactor c{, abs}.cond.fmt insnsNathan Froyd2010-06-091-83/+81
* target-mips: move FP FMT comments closer to the definitionsAurelien Jarno2010-06-091-14/+14
* target-mips: define constants for magic numbersNathan Froyd2010-06-091-142/+295
* target-mips: break out [ls][wd]c1 and rdhwr insn generationNathan Froyd2010-06-081-47/+59
* target-mips: Remove duplicate CPU log.Richard Henderson2010-05-051-6/+0
* target-mips: Fix format specifiers for fpu_fprintfStefan Weil2010-04-091-14/+20
* target-mips: Fix one more format specifier for cpu_fprintfStefan Weil2010-04-081-1/+3
* remove TARGET_* defines from translate-all.cPaolo Bonzini2010-04-081-0/+2
* target-mips: use newer logical opsAurelien Jarno2010-03-041-8/+4
* target-mips: use setcond when possibleAurelien Jarno2010-03-021-77/+20
* target-mips: fix ROTR and DROTR by zeroNathan Froyd2010-02-231-0/+4
* target-mips: fix CpU exception for coprocessor 0Nathan Froyd2010-02-231-1/+1
* target-mips: remove useless sign extensionAurelien Jarno2010-02-231-2/+0
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