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target-mips
/
translate.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
target-mips: add loongson 2E & 2F integer instructions
Aurelien Jarno
2010-07-11
1
-0
/
+271
*
target-mips: add Loongson support prefetch
Aurelien Jarno
2010-07-01
1
-35
/
+43
*
target-mips: split load and store
Aurelien Jarno
2010-07-01
1
-155
/
+183
*
target-mips: fix DINSU instruction
Aurelien Jarno
2010-06-30
1
-1
/
+1
*
target-mips: enable movn/movz on loongson 2E & 2F
Aurelien Jarno
2010-06-29
1
-1
/
+2
*
target-mips: Fix compilation
Stefan Weil
2010-06-09
1
-1
/
+1
*
target-mips: microMIPS ASE support
Nathan Froyd
2010-06-09
1
-5
/
+2385
*
target-mips: mips16 cleanups
Nathan Froyd
2010-06-09
1
-7
/
+17
*
target-mips: refactor c{, abs}.cond.fmt insns
Nathan Froyd
2010-06-09
1
-83
/
+81
*
target-mips: move FP FMT comments closer to the definitions
Aurelien Jarno
2010-06-09
1
-14
/
+14
*
target-mips: define constants for magic numbers
Nathan Froyd
2010-06-09
1
-142
/
+295
*
target-mips: break out [ls][wd]c1 and rdhwr insn generation
Nathan Froyd
2010-06-08
1
-47
/
+59
*
target-mips: Remove duplicate CPU log.
Richard Henderson
2010-05-05
1
-6
/
+0
*
target-mips: Fix format specifiers for fpu_fprintf
Stefan Weil
2010-04-09
1
-14
/
+20
*
target-mips: Fix one more format specifier for cpu_fprintf
Stefan Weil
2010-04-08
1
-1
/
+3
*
remove TARGET_* defines from translate-all.c
Paolo Bonzini
2010-04-08
1
-0
/
+2
*
target-mips: use newer logical ops
Aurelien Jarno
2010-03-04
1
-8
/
+4
*
target-mips: use setcond when possible
Aurelien Jarno
2010-03-02
1
-77
/
+20
*
target-mips: fix ROTR and DROTR by zero
Nathan Froyd
2010-02-23
1
-0
/
+4
*
target-mips: fix CpU exception for coprocessor 0
Nathan Froyd
2010-02-23
1
-1
/
+1
*
target-mips: remove useless sign extension
Aurelien Jarno
2010-02-23
1
-2
/
+0
*
target-mips: fix user-mode emulation startup
Nathan Froyd
2009-12-13
1
-0
/
+8
*
target-mips: add copyright notice for mips16 work
Nathan Froyd
2009-12-13
1
-0
/
+1
*
target-mips: add mips16 instruction decoding
Nathan Froyd
2009-12-13
1
-9
/
+1063
*
target-mips: add enums for MIPS16 opcodes
Nathan Froyd
2009-12-13
1
-0
/
+112
*
target-mips: split out delay slot handling
Nathan Froyd
2009-12-13
1
-55
/
+79
*
target-mips: add gen_base_offset_addr
Nathan Froyd
2009-12-13
1
-24
/
+16
*
target-mips: make gen_compute_branch 16/32-bit-aware
Nathan Froyd
2009-12-13
1
-7
/
+8
*
target-mips: move ROTR and ROTRV inside gen_shift_{imm, }
Nathan Froyd
2009-12-13
1
-139
/
+148
*
target-mips: use physical address in lladdr
Aurelien Jarno
2009-11-30
1
-28
/
+13
*
target-mips: make CP0_LLAddr register CPU dependent
Aurelien Jarno
2009-11-22
1
-2
/
+5
*
target-mips: rename CP0_LLAddr into lladdr
Aurelien Jarno
2009-11-22
1
-6
/
+6
*
target-mips: fix indentation
Aurelien Jarno
2009-11-14
1
-2
/
+2
*
mips: fix cpu_reset memory leak
Blue Swirl
2009-11-14
1
-4
/
+51
*
Revert "Get rid of _t suffix"
Anthony Liguori
2009-10-01
1
-2
/
+2
*
Get rid of _t suffix
malc
2009-10-01
1
-2
/
+2
*
target-mips: make sure constants are in the second argument
Aurelien Jarno
2009-09-30
1
-7
/
+7
*
mips: Fix spelling in comment
Stefan Weil
2009-09-30
1
-2
/
+2
*
target-mips: log instructions start in TCG code
Aurelien Jarno
2009-09-28
1
-0
/
+4
*
target-mips: remove MAX_OP_PER_INSTR workaround
Aurelien Jarno
2009-09-23
1
-2
/
+1
*
target-mips: fix single-stepping
Nathan Froyd
2009-09-14
1
-3
/
+18
*
Fix sys-queue.h conflict for good
Blue Swirl
2009-09-12
1
-2
/
+2
*
target-mips: fix conditional moves off fp condition codes
Nathan Froyd
2009-08-25
1
-5
/
+5
*
Update to a hopefully more future proof FSF address
Blue Swirl
2009-07-16
1
-2
/
+1
*
target-mips: remove useless code in gen_st_cond()
Aurelien Jarno
2009-07-12
1
-1
/
+0
*
Fix MIPS SC
Paul Brook
2009-07-12
1
-2
/
+2
*
MIPS atomic instructions
Paul Brook
2009-07-09
1
-24
/
+59
*
target-mips: fix MADD and MSUB/MSUBU instructions
Nathan Froyd
2009-07-03
1
-3
/
+3
*
Replace gcc variadic macro extension with C99 version
Blue Swirl
2009-05-13
1
-3
/
+3
*
target-mips: proper sign extension for 'SUBU rd, zero, rt'
Aurelien Jarno
2009-05-04
1
-0
/
+1
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