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path: root/target-mips/op_helper.c
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* target-mips: Ignore unassigned accesses with KVMJames Hogan2014-08-071-0/+11
* target-mips: implement UserLocal RegisterPetar Jovanovic2014-06-181-1/+13
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-5/+1
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-14/+0
* softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini2014-06-051-1/+0
* softmmu: make do_unaligned_access a method of CPUPaolo Bonzini2014-06-051-6/+5
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-1/+1
* target-mips: Avoid shifting left into sign bitPeter Maydell2014-03-271-1/+1
* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-131-1/+3
* exec: Change cpu_abort() argument to CPUStateAndreas Färber2014-03-131-2/+9
* translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber2014-03-131-1/+1
* cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber2014-03-131-2/+2
* exec: Change tlb_fill() argument to CPUStateAndreas Färber2014-03-131-3/+4
* cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-3/+6
* cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber2014-03-131-1/+2
* target-mips: add user-mode FR switch support for MIPS32r5Petar Jovanovic2014-02-101-3/+38
* target-mips: add support for CP0_Config5Petar Jovanovic2014-02-101-0/+6
* target-mips: add support for CP0_Config4Petar Jovanovic2014-02-101-0/+6
* cpu: Use QTAILQ for CPU listAndreas Färber2013-09-031-6/+4
* target-mips: Remove assignment to a variable which is never usedStefan Weil2013-07-291-1/+0
* cpu: Make first_cpu and next_cpu CPUStateAndreas Färber2013-07-091-13/+12
* cpu: Turn cpu_unassigned_access() into a CPUState hookAndreas Färber2013-06-281-4/+9
* cpu: Pass CPUState to cpu_interrupt()Andreas Färber2013-03-121-4/+4
* exec: Pass CPUState to cpu_reset_interrupt()Andreas Färber2013-03-121-3/+2
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-121-3/+7
* target-mips: Use mul[us]2 in [D]MULT[U] insnsRichard Henderson2013-02-231-12/+0
* target-mips: Unfuse {,N}M{ADD,SUB}.fmtRichard Sandiford2013-01-311-8/+17
* exec: Return CPUState from qemu_get_cpu()Andreas Färber2013-01-151-3/+8
* target-mips: Clean up mips_cpu_map_tc() documentationAndreas Färber2013-01-151-5/+9
* cpu: Move nr_{cores,threads} fields to CPUStateAndreas Färber2013-01-151-3/+5
* target-mips: Replace macros by inline functionsStefan Weil2013-01-081-18/+24
* target-mips: Use EXCP_SC rather than a magic number陳韋任 (Wei-Ren Chen)2013-01-011-3/+2
* target-mips: Remove semicolon from macro definitionStefan Weil2013-01-011-1/+1
* misc: move include files to include/qemu/Paolo Bonzini2012-12-191-1/+1
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-5/+5
* exec: refactor cpu_restore_stateBlue Swirl2012-12-161-7/+1
* target-mips: don't flush extra TLB on permissions upgradeAurelien Jarno2012-10-311-5/+23
* target-mips: fix TLBR wrt SEGMaskAurelien Jarno2012-10-311-0/+6
* target-mips: implement unaligned loads using TCGAurelien Jarno2012-10-311-142/+0
* target-mips: simplify load/store microMIPS helpersAurelien Jarno2012-10-311-64/+9
* target-mips: restore CPU state after an FPU exceptionAurelien Jarno2012-10-311-90/+95
* target-mips: use softfloat constants when possibleAurelien Jarno2012-10-311-48/+44
* target-mips: cleanup float to int conversion helpersAurelien Jarno2012-10-311-39/+79
* target-mips: fix FPU exceptionsAurelien Jarno2012-10-311-13/+19
* target-mips: keep softfloat exception set to 0 between instructionsAurelien Jarno2012-10-311-63/+10
* target-mips: use the softfloat floatXX_muladd functionsAurelien Jarno2012-10-311-89/+48
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-231-3/+3
* target-mips: Pass MIPSCPU to mips_vpe_sleep()Andreas Färber2012-10-171-3/+7
* target-mips: Pass MIPSCPU to mips_tc_sleep()Andreas Färber2012-10-171-3/+5
* target-mips: Pass MIPSCPU to mips_vpe_is_wfi()Andreas Färber2012-10-171-4/+8
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