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* target-mips: Add compiler attribute to some functions which don't returnStefan Weil2012-03-241-1/+2
| | | | | | | | | | helper_raise_exception_err does not return, nor do helper_raise_exception and do_unaligned_access. Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: Don't overuse CPUStateAndreas Färber2012-03-141-62/+62
| | | | | | | | | Scripted conversion: sed -i "s/CPUState/CPUMIPSState/g" target-mips/*.[hc] sed -i "s/#define CPUMIPSState/#define CPUState/" target-mips/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
* Spelling fixes in comments (it's -> its)Stefan Weil2012-03-081-1/+1
| | | | | | | | | | * it's -> its (fixed for all files) * dont -> don't (only fixed in a line which was touched by the previous fix) * distrub -> disturb (fixed in the same line) Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* softmmu_header: pass CPUState to tlb_fillBlue Swirl2011-10-011-4/+3
| | | | | | | Pass CPUState pointer to tlb_fill() instead of architecture local cpu_single_env hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* mips: Add MT halting and waking of VPEsEdgar E. Iglesias2011-09-061-4/+78
| | | | | | + some partial support for TC's. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* mips: Correct IntCtl write mask for VIntEdgar E. Iglesias2011-09-061-1/+1
| | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* mips: Hook in more reg accesses via mttr/mftrEdgar E. Iglesias2011-09-061-11/+129
| | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* mips: Synchronize CP0 TCSTatus, Status and EntryHiEdgar E. Iglesias2011-09-061-44/+106
| | | | | | | These registers share some of their fields. Writes to these fields should be visible through the corresponding mirror fields. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* mips: Handle TC indexing of other VPEsEdgar E. Iglesias2011-09-061-105/+161
| | | | | | | Introduce mips_cpu_map_tc() to map a global TC index into a VPE nr and local tc index. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl2011-08-071-1/+1
| | | | | | | | | Parameter is_softmmu (and its evil mutant twin brother is_softmuu) is not used in cpu_*_handle_mmu_fault() functions, remove them and adjust callers. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* exec.h cleanupBlue Swirl2011-07-301-1/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move softmmu_exec.h include directives from target-*/exec.h to target-*/op_helper.c. Move also various other stuff only used in op_helper.c there. Define global env in dyngen-exec.h. For i386, move wrappers for segment and FPU helpers from user-exec.c to op_helper.c. Implement raise_exception_err_env() to handle dynamic CPUState. Move the function declarations to cpu.h since they can be used outside of op_helper.c context. LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and env_to_regs(). ARM: make raise_exception() static. Convert #include "exec.h" to #include "cpu.h" #include "dyngen-exec.h" and remove now unused target-*/exec.h. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Fix unassigned memory access handlingBlue Swirl2011-07-201-2/+4
| | | | | | | | cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memory access handling. Fix them by always passing CPUState to the handlers. Reported-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cpu_loop_exit: avoid using AREG0Blue Swirl2011-06-261-2/+2
| | | | | | | Make cpu_loop_exit() take a parameter for CPUState instead of relying on global env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Remove unused function parameter from cpu_restore_stateStefan Weil2011-04-201-2/+2
| | | | | | | | | The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
* target-mips: clear softfpu exception state for comparison instructionsAurelien Jarno2011-04-171-16/+25
| | | | | | | MIPS FPU instructions should start with a clean softfpu status. This is done for the most instructions, but not for comparison ones. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix c.ps.* instructionsAurelien Jarno2011-04-171-4/+4
| | | | | | | Contrary to cabs.ps.* instructions, c.ps.* should not compare the absolute value of the operand, but directly the operands. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: don't hardcode softfloat exception bitsAurelien Jarno2011-04-171-15/+20
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: simplify FP comparisonsAurelien Jarno2011-04-171-36/+36
| | | | | | | | As the softfloat comparison functions already test for NaN, there is no need to always call the float*_unordered*() functions. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: rename float*_eq() into float*_eq_quiet()Aurelien Jarno2011-04-171-16/+16
| | | | | | | | | | | | | | float*_eq functions have a different semantics than other comparison functions. Fix that by first renaming float*_quiet() into float*_eq_quiet(). Note that it is purely mechanical, and the behaviour should be unchanged. That said it clearly highlight problems due to this different semantics, they are fixed later in this patch series. Cc: Alexander Graf <agraf@suse.de> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: use new float*_unordered*() functionsAurelien Jarno2011-04-171-98/+70
| | | | | | | | Use the new float*_unordered*() functions from softfloat instead of redefining a private version. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* [PATCH] [MIPS] Clear softfpu exception state for round, trunc, ceil and floorChris Dearman2011-02-091-0/+16
| | | | | | | | | MIPS FPU instructions should start with a clean softfpu status. This is done for the arithmetic operations and cvt instructions, but not for round, trunc, ceil and floor. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()Peter Maydell2011-01-021-4/+4
| | | | | | | | | | | | | | | | The softfloat functions float*_is_nan() were badly misnamed, because they return true only for quiet NaNs, not for all NaNs. Rename them to float*_is_quiet_nan() to more accurately reflect what they do. This change was produced by: perl -p -i -e 's/_is_nan/_is_quiet_nan/g' $(git grep -l is_nan) (with the results manually checked.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix translation of MT instructionsNathan Froyd2010-12-221-20/+8
| | | | | | | | | | | | | | | | The translation of dmt/emt/dvpe/evpe was doing the moral equivalent of: int x; ... /* no initialization of x */ x = f (x); which confused later bits of TCG rather badly, leading to crashes. Fix the helpers to only return results (those instructions have no inputs), and fix the translation code accordingly. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* MIPS: fix yield handlingBlue Swirl2010-09-181-1/+3
| | | | | | | | | The parameter for yield should be handled as a signed integer for the comparisons to have any effect. This also avoids a gcc warning with -Wtype-limits. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Correctly identify multiple cpus in SMP systemsHervé Poussineau2010-07-311-2/+1
| | | | | Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* mips: more fixes to the MIPS interrupt glue logicAurelien Jarno2010-07-251-12/+8
| | | | | | | | | | Commit 36388314febad3d7675ab919287f03733a560ff6 moved most of the interrupt logic to cpu-exec.c. Remove the remaining useless code and fix software interrupts. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Edgar E. Iglesias <edgar@axis.com> Tested-by: Edgar E. Iglesias <edgar@axis.com>
* mips: Correct MIPS interrupt glue logic for icountEdgar E. Iglesias2010-07-241-11/+0
| | | | | | | | | | | When hw interrupt pending bits in CP0_Cause are set, the CPU should see the hw interrupt line as active. The CPU may or may not take the interrupt based on internal state (global irq mask etc) but the glue logic shouldn't care. This fixes MIPS external hw interrupts in combination with -icount. Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
* remove unused stuff from */exec.hPaolo Bonzini2010-07-031-1/+6
| | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: microMIPS ASE supportNathan Froyd2010-06-091-0/+136
| | | | | | | | Add instruction decoding for the microMIPS ASE. All we do is decode and then forward to the existing gen_* routines. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno2010-02-061-2/+16
| | | | | | | In helper.c AREG0 may not correspond do env, so it's not possible to call cpu_loop_exit() here. Call it from op_helper.c instead. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: change interrupt bits to be mips16-awareNathan Froyd2009-12-131-3/+14
| | | | | | | | We need to stash the operating mode into the low bit of the error PC and restore it on return from interrupts. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: use physical address in lladdrAurelien Jarno2009-11-301-0/+39
| | | | | | | | Currently the ll/sc instructions use the virtual address in both user and system mode. Use the physical address insteead in system mode. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: factorize load/store code in op_helper.cAurelien Jarno2009-11-301-152/+100
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno2009-11-221-2/+9
| | | | | | | | Depending on the CPU, CP0_LLAddr is either read-only or read-write, and the returned value can be shifted by a variable amount of bits. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
* target-mips: rename CP0_LLAddr into lladdrAurelien Jarno2009-11-221-7/+7
| | | | | | | | The variable CP0_LLAddr represent the full lladdr, not the actual register value, which is only part of this value and depends on the CPU. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix indentationAurelien Jarno2009-11-141-1/+1
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-011-4/+4
| | | | | | | | | | | | In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Get rid of _t suffixmalc2009-10-011-4/+4
| | | | | | | Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
* Add 'static' to please SparseBlue Swirl2009-09-211-1/+1
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: variable names consistencyaurel322009-04-151-364/+364
| | | | | | | | | | | Use a consistent naming of arguments and TCG variables across the whole file, the same as in tcg/tcg-op.h: - arg1, arg2, ... for arguments - t0, t1, t2, ... for variables Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7106 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: implement FPU Flush-To-Zero modeaurel322009-03-281-0/+5
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6914 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: remove dead codeaurel322009-03-081-34/+0
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6774 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: rename helpers from do_ to helper_aurel322009-03-081-270/+261
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6773 c046a42c-6fe2-441c-8c8c-71466251a162
* global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori2009-01-151-3/+3
| | | | | | | | | | | | These are references to 'loglevel' that aren't on a simple 'if (loglevel & X) qemu_log()' statement. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert references to logfile/loglevel to use qemu_log*() macrosaliguori2009-01-151-33/+33
| | | | | | | | | | | | This is a large patch that changes all occurrences of logfile/loglevel global variables to use the new qemu_log*() macros. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: fix indentationaurel322009-01-141-11/+11
| | | | | | | | Remove all tabs from target-mips/* Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6306 c046a42c-6fe2-441c-8c8c-71466251a162
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
| | | | | | | | | | The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix remaining compiler warnings for mips targets.ths2008-12-201-2/+4
| | | | | | | Signed-off-by: Stefan Weil <weil@mail.berlios.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6111 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS: remove a few warningsaurel322008-12-071-4/+4
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5944 c046a42c-6fe2-441c-8c8c-71466251a162
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