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* cpu: Pass CPUState to cpu_interrupt()Andreas Färber2013-03-121-4/+4
| | | | | | | | Move it to qom/cpu.h to avoid issues with include order. Change pc_acpi_smi_interrupt() opaque to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
* exec: Pass CPUState to cpu_reset_interrupt()Andreas Färber2013-03-121-3/+2
| | | | | | | | | | | | Move it to qom/cpu.c to avoid build failures depending on include order of cpu-qom.h and exec/cpu-all.h. Change opaques of various ..._irq_handler() functions to the appropriate CPU type to facilitate using cpu_reset_interrupt(). Fix Coding Style issues while at it (missing braces, indentation). Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-121-3/+7
| | | | | | | | | | Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-mips: Use mul[us]2 in [D]MULT[U] insnsRichard Henderson2013-02-231-12/+0
| | | | | | Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: Unfuse {,N}M{ADD,SUB}.fmtRichard Sandiford2013-01-311-8/+17
| | | | | | | | | Turn MADD.fmt, MSUB.fmt, NMADD.fmt and NMSUB.fmt from fused to unfused operations, so that they behave in the same way as a separate multiplication and addition. The instructions were only fused in early MIPS IV processors. Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* exec: Return CPUState from qemu_get_cpu()Andreas Färber2013-01-151-3/+8
| | | | | | | Move the declaration to qemu/cpu.h and add documentation. The implementation still depends on CPUArchState for CPU iteration. Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-mips: Clean up mips_cpu_map_tc() documentationAndreas Färber2013-01-151-5/+9
| | | | | | | | This function will be touched again soon, so a good understanding of env vs. other helps. Adopt gtk-doc style. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Eric Johnson <ericj@mips.com>
* cpu: Move nr_{cores,threads} fields to CPUStateAndreas Färber2013-01-151-3/+5
| | | | | | | | To facilitate the field movements, pass MIPSCPU to malta_mips_config(); avoid that for mips_cpu_map_tc() since callers only access MIPS Thread Contexts, inside TCG helpers. Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-mips: Replace macros by inline functionsStefan Weil2013-01-081-18/+24
| | | | | | | | | | | | | The macros RESTORE_ROUNDING_MODE and RESTORE_FLUSH_MODE silently used variable env from their callers. Using inline functions with env passed as a function argument is more transparent. This modification was proposed by Peter Maydell. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Eric Johnson <ericj@mips.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: Use EXCP_SC rather than a magic number陳韋任 (Wei-Ren Chen)2013-01-011-3/+2
| | | | | | | | | | | From the discussion on the ML [1], the exception limit defined by magic number 0x100 is actually EXCP_SC defined in cpu.h. Replace the magic number with EXCP_SC. Remove "#if 1 .. #endif" as well. [1] http://lists.gnu.org/archive/html/qemu-devel/2012-11/msg03080.html Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: Remove semicolon from macro definitionStefan Weil2013-01-011-1/+1
| | | | | | | | | | | | | Macro RESTORE_FLUSH_MODE is similar to RESTORE_ROUNDING_MODE but included a semicolon. The code which uses that macro also includes a semicolon, so the result was an empty statement. Remove the superfluous semicolon from the macro definition. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* misc: move include files to include/qemu/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-5/+5
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: refactor cpu_restore_stateBlue Swirl2012-12-161-7/+1
| | | | | | | | Refactor common code around calls to cpu_restore_state(). tb_find_pc() has now no external users, make it static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: don't flush extra TLB on permissions upgradeAurelien Jarno2012-10-311-5/+23
| | | | | | | | If the guest uses a TLBWI instruction for upgrading permissions, we don't need to flush the extra TLBs. This improve boot time performance by about 10%. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix TLBR wrt SEGMaskAurelien Jarno2012-10-311-0/+6
| | | | | | | Like r4k_map_address(), r4k_helper_tlbp() should use SEGMask to mask the address. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: implement unaligned loads using TCGAurelien Jarno2012-10-311-142/+0
| | | | | | | | | | | | | Load/store from helpers should be avoided as they are quite inefficient. Rewrite unaligned loads instructions using TCG and aligned loads. The number of actual loads operations to implement an unaligned load instruction is reduced from up to 8 to 1. Note: As we can't rely on shift by 32 or 64 undefined behaviour, the code loads already shift by one constants. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: simplify load/store microMIPS helpersAurelien Jarno2012-10-311-64/+9
| | | | | | | | | load/store microMIPS helpers are reinventing the wheel. Call do_lw, do_ll, do_sw and do_sl instead of using a macro calling the cpu_* load/store functions. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: restore CPU state after an FPU exceptionAurelien Jarno2012-10-311-90/+95
| | | | | | | | | | | Rework *raise_exception*() functions so that they can be called from other helpers, passing the return address as an argument. Use do_raise_exception() function in update_fcr31() to correctly restore the CPU state after an FPU exception. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: use softfloat constants when possibleAurelien Jarno2012-10-311-48/+44
| | | | | | | | | | | | | | softfloat already has a few constants defined, use them instead of redefining them in target-mips. Rename FLOAT_SNAN32 and FLOAT_SNAN64 to FP_TO_INT32_OVERFLOW and FP_TO_INT64_OVERFLOW as even if they have the same value, they are technically different (and defined differently in the MIPS ISA). Remove the unused constants. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: cleanup float to int conversion helpersAurelien Jarno2012-10-311-39/+79
| | | | | | | | | | Instead of accessing the flags from the floating point control register after updating it, read the softfloat flags. This is just code cleanup and should not change the behaviour. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix FPU exceptionsAurelien Jarno2012-10-311-13/+19
| | | | | | | | | | | | | | For each FPU instruction that can trigger an FPU exception, to call call update_fcr31() after. Remove the manual NaN assignment in case of float to float operation, as softfloat is already taking care of that. However for float to int operation, the value has to be changed to the MIPS one. In the cvtpw_ps case, the two registers have to be handled separately to guarantee a correct final value in both registers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: keep softfloat exception set to 0 between instructionsAurelien Jarno2012-10-311-63/+10
| | | | | | | | | Instead of clearing the softfloat exception flags before each floating point instruction, reset them to 0 in update_fcr31() when an exception is detected. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: use the softfloat floatXX_muladd functionsAurelien Jarno2012-10-311-89/+48
| | | | | | | | | | Use the new softfloat floatXX_muladd() functions to implement the madd, msub, nmadd and nmsub instructions. At the same time replace the name of the helpers by the name of the instruction, as the only reason for the previous names was to keep the macros simple. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-231-3/+3
| | | | | | | | | | | | | | | target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* target-mips: Pass MIPSCPU to mips_vpe_sleep()Andreas Färber2012-10-171-3/+7
| | | | | | | Needed for moving halted field to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: Pass MIPSCPU to mips_tc_sleep()Andreas Färber2012-10-171-3/+5
| | | | | | | Needed for changing mips_vpe_sleep() argument type to MIPSCPU. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: Pass MIPSCPU to mips_vpe_is_wfi()Andreas Färber2012-10-171-4/+8
| | | | | | | | | | Needed for moving halted field to CPUState. The variable name "c" is retained for MIPSCPU to leave "cpu" for CPUState. Also change return type to bool while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: Pass MIPSCPU to mips_tc_wake()Andreas Färber2012-10-171-3/+8
| | | | | | | Needed for changing mips_vpe_is_wfi() argument type to MIPSCPU. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: Clean up other_cpu in helper_{d,e}vpe()Andreas Färber2012-10-171-14/+14
| | | | | | | | | Free the variable name "other_cpu" for later use for MIPSCPU. Fix off-by-one indentation while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: switch to AREG0 free modeBlue Swirl2012-09-151-505/+560
| | | | | | | | Add an explicit CPUState parameter instead of relying on AREG0 and switch to AREG0 free mode. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Aurelien Jarno <aurelien@aurel32.net>
* MIPS/user: Fix reset CPU state initializationMaciej W. Rozycki2012-09-081-49/+0
| | | | | | | | | | | | | | | | | | This change updates the CPU reset sequence to use a common piece of code that figures out CPU state flags, fixing the problem with MIPS_HFLAG_COP1X not being set where applicable that causes floating-point MADD family instructions (and other instructions from the MIPS IV FP subset) to trap. As compute_hflags is now shared between op_helper.c and translate.c, the function is now moved to a common header. There are no changes to this function. The problem was seen with the 24Kf MIPS32r2 processor in user emulation. The new approach prevents system and user emulation from diverging -- all the hflags state is initialized in one place now. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: Fix some helper functions (VR54xx multiplication)Stefan Weil2012-08-241-46/+29
| | | | | | | | | | | | | Commits b5dc7732e1cc2fb549e48b7b5d664f2c79628e2e and be24bb4f3007c3e07cbf1934f7e781493d876ab7 optimized the code and removed the correct setting of t0. Fix this. gcc-4.7 detected this bug because parameter arg1 was unused but set in set_HIT0_LO and set_HI_LOT0. Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: Remove unused inline functionStefan Weil2012-05-031-6/+0
| | | | | | Function set_HILO is not needed anywhere. Signed-off-by: Stefan Weil <sw@weilnetz.de>
* target-mips: Fix type cast for w64 (uintptr_t)Stefan Weil2012-04-151-1/+1
| | | | | | This changes nothing for other hosts. Signed-off-by: Stefan Weil <sw@weilnetz.de>
* Use uintptr_t for various op related functionsBlue Swirl2012-04-141-10/+8
| | | | | | | | | Use uintptr_t instead of void * or unsigned long in several op related functions, env->mem_io_pc and GETPC() macro. Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: Add compiler attribute to some functions which don't returnStefan Weil2012-03-241-1/+2
| | | | | | | | | | helper_raise_exception_err does not return, nor do helper_raise_exception and do_unaligned_access. Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: Don't overuse CPUStateAndreas Färber2012-03-141-62/+62
| | | | | | | | | Scripted conversion: sed -i "s/CPUState/CPUMIPSState/g" target-mips/*.[hc] sed -i "s/#define CPUMIPSState/#define CPUState/" target-mips/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
* Spelling fixes in comments (it's -> its)Stefan Weil2012-03-081-1/+1
| | | | | | | | | | * it's -> its (fixed for all files) * dont -> don't (only fixed in a line which was touched by the previous fix) * distrub -> disturb (fixed in the same line) Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* softmmu_header: pass CPUState to tlb_fillBlue Swirl2011-10-011-4/+3
| | | | | | | Pass CPUState pointer to tlb_fill() instead of architecture local cpu_single_env hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* mips: Add MT halting and waking of VPEsEdgar E. Iglesias2011-09-061-4/+78
| | | | | | + some partial support for TC's. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* mips: Correct IntCtl write mask for VIntEdgar E. Iglesias2011-09-061-1/+1
| | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* mips: Hook in more reg accesses via mttr/mftrEdgar E. Iglesias2011-09-061-11/+129
| | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* mips: Synchronize CP0 TCSTatus, Status and EntryHiEdgar E. Iglesias2011-09-061-44/+106
| | | | | | | These registers share some of their fields. Writes to these fields should be visible through the corresponding mirror fields. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* mips: Handle TC indexing of other VPEsEdgar E. Iglesias2011-09-061-105/+161
| | | | | | | Introduce mips_cpu_map_tc() to map a global TC index into a VPE nr and local tc index. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl2011-08-071-1/+1
| | | | | | | | | Parameter is_softmmu (and its evil mutant twin brother is_softmuu) is not used in cpu_*_handle_mmu_fault() functions, remove them and adjust callers. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* exec.h cleanupBlue Swirl2011-07-301-1/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move softmmu_exec.h include directives from target-*/exec.h to target-*/op_helper.c. Move also various other stuff only used in op_helper.c there. Define global env in dyngen-exec.h. For i386, move wrappers for segment and FPU helpers from user-exec.c to op_helper.c. Implement raise_exception_err_env() to handle dynamic CPUState. Move the function declarations to cpu.h since they can be used outside of op_helper.c context. LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and env_to_regs(). ARM: make raise_exception() static. Convert #include "exec.h" to #include "cpu.h" #include "dyngen-exec.h" and remove now unused target-*/exec.h. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Fix unassigned memory access handlingBlue Swirl2011-07-201-2/+4
| | | | | | | | cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memory access handling. Fix them by always passing CPUState to the handlers. Reported-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cpu_loop_exit: avoid using AREG0Blue Swirl2011-06-261-2/+2
| | | | | | | Make cpu_loop_exit() take a parameter for CPUState instead of relying on global env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Remove unused function parameter from cpu_restore_stateStefan Weil2011-04-201-2/+2
| | | | | | | | | The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
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