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* Per-CPU instruction decoding implementation, by Aurelien Jarno.ths2007-09-241-6/+3
* find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the...ths2007-09-171-1/+1
* find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths2007-09-161-3/+3
* Partial support for 34K multithreading, not functional yet.ths2007-09-061-27/+30
* Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.ths2007-08-261-3/+6
* MIPS64 improvements, based on a patch by Aurelien Jarno.ths2007-06-251-3/+3
* Handle MIPS64 SEGBITS value correctly.ths2007-06-231-13/+12
* Handle PX/UX status flags correctly, by Aurelien Jarno.ths2007-05-281-0/+3
* The 24k wants more watch and srsmap registers.ths2007-05-231-1/+1
* Full MIPS64 MMU implementation, by Aurelien Jarno.ths2007-05-131-5/+46
* MMU code improvements, by Aurelien Jarno.ths2007-05-131-12/+10
* MIPS TLB style selection at runtime, by Herve Poussineau.ths2007-05-131-31/+41
* Preliminary MIPS 64-bit MMU implementation, by Aurelien Jarno.ths2007-05-091-5/+57
* MIPS 64-bit FPU support, plus some collateral bugfixes in theths2007-05-071-0/+3
* Clear BD slot on next exception if appropriate.ths2007-05-071-0/+4
* Another fix for CP0 Cause register handling.ths2007-04-131-1/+1
* cpu_get_phys_page_debug should return target_phys_addr_tj_mayer2007-04-071-2/+2
* Fix handling of ADES exceptions.ths2007-04-061-1/+3
* fix branch delay slot cornercases.ths2007-04-051-1/+1
* Handle EBase properly.ths2007-04-051-1/+1
* Squash logic bugs while they are fresh...ths2007-03-301-1/+0
* Sanitize mips exception handling.ths2007-03-301-25/+20
* Fix BD flag handling, cause register contents, implement some more bitsths2007-03-181-3/+11
* Replace TLSZ with TARGET_FMT_lx.ths2007-02-201-6/+6
* Fix sign-extension of VPN field in TLB, by Herve Poussineau.ths2007-02-181-1/+1
* Fix PageMask handling, second part.ths2007-01-221-14/+33
* Bring TLB / PageSize handling in line with real hardware behaviour.ths2007-01-211-17/+5
* moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppr...bellard2007-01-031-0/+41
* Scrap SIGN_EXTEND32.ths2006-12-211-10/+10
* Preliminiary MIPS64 support, disabled by default due to performance impact.ths2006-12-211-17/+17
* Handle invalid accesses as SIGILL for mips/mipsel userland emulation.ths2006-12-101-0/+7
* Fix reset handling, CP0 isn't enabled by default (a fact which doesn'tths2006-12-071-35/+20
* Add MIPS32R2 instructions, and generally straighten out the instructionths2006-12-061-6/+0
* MIPS TLB performance improvements, by Daniel Jacobowitz.ths2006-12-061-1/+1
* consistent update of ERL and EXLbellard2006-06-261-1/+3
* use constants for TLB handling (Thiemo Seufer)bellard2006-06-141-32/+35
* fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer)bellard2006-05-221-1/+1
* cosmetics (Thiemo Seufer)bellard2006-05-221-4/+4
* mips cleanup (Thiemo Seufer)bellard2006-05-221-2/+0
* Clear MIPS_HFLAG_BMASK for ErrorEPC (Thiemo Seufer).pbrook2006-03-111-0/+1
* e bitfields in mips TLB structures (Thiemo Seufer).pbrook2006-03-111-6/+5
* MIPS fixes (Daniel Jacobowitz)bellard2005-12-051-7/+14
* correct split between helper.c and op_helper.c - cosmeticsbellard2005-07-041-48/+10
* TLB reload exception vector (Ralf Baechle)bellard2005-07-021-0/+3
* fixed c0_context in tlb exception (Ralf Baechle)bellard2005-07-021-3/+3
* use MIPS_TLB_NB constant (Ralf Baechle)bellard2005-07-021-1/+1
* remove nonsense exception code (Ralf Baechle)bellard2005-07-021-3/+0
* MIPS_USES_R4K_TLB typobellard2005-07-021-12/+11
* MIPS target (Jocelyn Mayer)bellard2005-07-021-0/+461
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