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* kill regs_to_env and env_to_regsPaolo Bonzini2010-01-191-8/+0
| | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* qemu: per-arch cpu_has_work (Marcelo Tosatti)aliguori2009-04-241-2/+8
| | | | | | | | | | Blue Swirl: fix Sparc32 breakage Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: rename helpers from do_ to helper_aurel322009-03-081-2/+0
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6773 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix remaining compiler warnings for mips targets.ths2008-12-201-15/+0
| | | | | | | Signed-off-by: Stefan Weil <weil@mail.berlios.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6111 c046a42c-6fe2-441c-8c8c-71466251a162
* Common cpu_loop_exit prototypeaurel322008-11-301-1/+0
| | | | | | | | | | | All archs use the same cpu_loop_exit, so move the prototype in a common header. i386 was carrying a __hidden attribute, but that was empty for this arch anyway. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize gen_op_addr_add() (2/2)aurel322008-11-111-1/+4
| | | | | | | | | Instead of dynamically generating different code depending on the UX flag, add a new flag in ctx->flags to generate different code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5677 c046a42c-6fe2-441c-8c8c-71466251a162
* Move the active FPU registers into env again, and use more TCG registersths2008-09-181-1/+1
| | | | | | | | | to access them. Signed-off-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS: remove empty cpu_mips_irqctrl_init()aurel322008-09-141-1/+0
| | | | | | | | | cpu_mips_irqctrl_init() function in hw/mips_timer.c is empty. Attached patch removes it, and its callers. (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5214 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix some warnings that would be generated by gcc -Wredundant-declsblueswir12008-08-301-3/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
* Use plain standard inline.ths2008-07-231-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4929 c046a42c-6fe2-441c-8c8c-71466251a162
* Use temporary registers for the MIPS FPU emulation.ths2008-07-091-23/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove remaining uses of T0 in the MIPS target.ths2008-06-241-6/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4788 c046a42c-6fe2-441c-8c8c-71466251a162
* T1 is now dead.ths2008-06-241-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4787 c046a42c-6fe2-441c-8c8c-71466251a162
* Pass T0/T1 explicitly to helper functions, and clean up a few dyngenths2008-06-231-1/+0
| | | | | | | leftovers. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4780 c046a42c-6fe2-441c-8c8c-71466251a162
* Delete obsolete prototypes.ths2008-06-201-21/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4760 c046a42c-6fe2-441c-8c8c-71466251a162
* Switch the standard multiplication instructions to TCG.ths2008-06-121-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4740 c046a42c-6fe2-441c-8c8c-71466251a162
* TCGify a few more instructions.ths2008-06-121-1/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4736 c046a42c-6fe2-441c-8c8c-71466251a162
* Call most FP helpers without deroute through op.cths2008-06-111-73/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4734 c046a42c-6fe2-441c-8c8c-71466251a162
* Move FP TNs to cpu env.ths2008-06-111-18/+18
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4728 c046a42c-6fe2-441c-8c8c-71466251a162
* Switch remaining CP0 instructions to TCG or helper functions.ths2008-06-091-34/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4708 c046a42c-6fe2-441c-8c8c-71466251a162
* Switch most MIPS logical and arithmetic instructions to TCG.ths2008-05-181-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4496 c046a42c-6fe2-441c-8c8c-71466251a162
* Delete redundant prototype.ths2008-05-071-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4379 c046a42c-6fe2-441c-8c8c-71466251a162
* Use TCG for MIPS GPR moves.ths2008-05-061-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4356 c046a42c-6fe2-441c-8c8c-71466251a162
* Simplify mips branch handling. Retire T2 from use. Use TCG for branches.ths2008-05-041-4/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4320 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix typo which broke MIPS32R2 64-bit FPU support.ths2008-01-091-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3902 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS COP1X (and related) instructions, by Richard Sandiford.ths2007-12-301-2/+16
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3877 c046a42c-6fe2-441c-8c8c-71466251a162
* Support for VR5432, and some of its special instructions. Original patchths2007-12-251-0/+14
| | | | | | | by Dirk Behme. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3859 c046a42c-6fe2-441c-8c8c-71466251a162
* Use FORCE_RET, scrap RETURN which was implemented in target-specific code.ths2007-11-091-6/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3560 c046a42c-6fe2-441c-8c8c-71466251a162
* Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths2007-11-081-3/+3
| | | | | | | defines for linux-user. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3556 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement missing MIPS supervisor mode bits.ths2007-10-281-8/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
* Add sharable clz/clo inline functions and use them for the mips target.ths2007-10-271-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3455 c046a42c-6fe2-441c-8c8c-71466251a162
* Replace is_user variable with mmu_idx in softmmu core,j_mayer2007-10-141-1/+1
| | | | | | | | | | | | | | allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
* Use always_inline in the MIPS support where applicable.ths2007-10-091-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3375 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix [ls][wd][lr] instructions, by Aurelien Jarno.ths2007-10-091-30/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3372 c046a42c-6fe2-441c-8c8c-71466251a162
* Code provision for n32/n64 mips userland emulation. Not functional yet.ths2007-09-301-5/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
* Supervisor mode implementation, by Aurelien Jarno.ths2007-09-291-4/+9
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3267 c046a42c-6fe2-441c-8c8c-71466251a162
* hflags computation cleanup, by Aurelien Jarno.ths2007-09-261-1/+25
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3243 c046a42c-6fe2-441c-8c8c-71466251a162
* Timer start/stop implementation, by Aurelien Jarno.ths2007-09-251-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3237 c046a42c-6fe2-441c-8c8c-71466251a162
* find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths2007-09-161-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
* Partial support for 34K multithreading, not functional yet.ths2007-09-061-19/+20
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
* Clean up of some target specifics in exec.c/cpu-exec.c.ths2007-06-031-8/+19
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
* More MIPS 64-bit FPU support.ths2007-05-191-46/+50
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
* - Move FPU exception handling into helper functions, since they are big.ths2007-05-181-0/+71
| | | | | | | | | - Fix FP-conditional branches. - Check FPU register mode at runtime, not translation time, as the F64 status bit can change. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
* More generic 64 bit multiplication support, by Aurelien Jarno.ths2007-05-161-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS TLB style selection at runtime, by Herve Poussineau.ths2007-05-131-5/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS 64-bit FPU support, plus some collateral bugfixes in theths2007-05-071-0/+6
| | | | | | | conditional branch handling. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
* Kill broken host register definitions, thanks to Paul Brook and Herveths2007-04-291-11/+4
| | | | | | | Poussineau for debugging this. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2747 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix qemu SIGFPE caused by division-by-zero due to underflow.ths2007-04-151-1/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2673 c046a42c-6fe2-441c-8c8c-71466251a162
* Actually enable 64bit configuration.ths2007-04-011-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
* Malta CBUS UART support.ths2007-03-311-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
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