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* microblaze: cpu: Delete MMAP_SHIFT definitionPeter Crosthwaite2015-06-031-1/+0
* microblaze: cpu: delete unused cpu_interrupts_enabledPeter Crosthwaite2015-04-301-5/+0
* microblaze: cpu: Renumber EXCP_* constants to close gapMichael Tokarev2015-04-301-5/+5
* microblaze: cpu: Delete EXCP_NMIPeter Crosthwaite2015-04-301-1/+0
* microblaze: cpu: Remove unused CC_OP enumPeter Crosthwaite2015-04-301-6/+0
* microblaze: cpu: Remote unused cpu_get_pcPeter Crosthwaite2015-04-301-5/+0
* microblaze: mmu: Delete flip_um fn prototypePeter Crosthwaite2015-04-301-1/+0
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-8/+4
* cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost2015-03-101-8/+1
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-12/+8
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+1
* exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell2015-01-201-2/+0
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
* qemu-log: add log category for MMU infoAntony Pavlov2014-12-161-4/+4
* target-microblaze: Use cpu_exec_interrupt qom hookRichard Henderson2014-09-253-0/+18
* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
* target-microblaze: Delete unused sign_extend() functionPeter Maydell2014-06-101-13/+0
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-052-1/+2
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-10/+0
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-283-9/+3
* microblaze: Respect the reset vectorEdgar E. Iglesias2014-05-131-0/+2
* cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber2014-03-131-2/+2
* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-132-2/+3
* cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber2014-03-131-1/+2
* target-microblaze: Replace DisasContext::env field with MicroBlazeCPUAndreas Färber2014-03-131-44/+43
* exec: Change cpu_abort() argument to CPUStateAndreas Färber2014-03-132-15/+21
* translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber2014-03-131-4/+1
* cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber2014-03-131-2/+2
* exec: Change tlb_fill() argument to CPUStateAndreas Färber2014-03-131-5/+8
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-132-3/+4
* cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2014-03-132-10/+10
* cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber2014-03-134-10/+14
* cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber2014-03-132-5/+6
* Microblaze: Convert Microblaze-pic handling to GPIOsAlistair Francis2014-01-142-0/+25
* target-microblaze: Use the new qemu_ld/st opcodesRichard Henderson2013-12-131-104/+35
* microblaze: At swx, check that the reserved word is unmodifiedEdgar E. Iglesias2013-10-242-0/+17
* microblaze: Turn res_addr into a tcg globalEdgar E. Iglesias2013-10-241-6/+7
* microblaze: Move the saving of the reservation addr into gen_loadEdgar E. Iglesias2013-10-241-5/+8
* microblaze: Improve srcEdgar E. Iglesias2013-10-241-11/+4
* microblaze: Improve srlEdgar E. Iglesias2013-10-241-5/+2
* microblaze: Simplify andn by using tcg_gen_andcEdgar E. Iglesias2013-10-241-4/+1
* microblaze: Make write_carryi input a booleanEdgar E. Iglesias2013-10-241-2/+2
* microblaze: Clarify expected input of write_carryEdgar E. Iglesias2013-10-241-0/+4
* tcg: Move helper registration into tcg_context_initRichard Henderson2013-10-101-2/+0
* tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson2013-09-021-1/+1
* cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber2013-07-291-2/+3
* cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber2013-07-274-4/+16
* gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber2013-07-271-2/+2
* target-microblaze: Move cpu_gdb_{read,write}_register()Andreas Färber2013-07-271-0/+49
* cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber2013-07-261-0/+1
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