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* target-microblaze: Use cpu_exec_interrupt qom hookRichard Henderson2014-09-251-0/+1
| | | | | | | Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Message-id: 1410626734-3804-20-git-send-email-rth@twiddle.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* microblaze: Respect the reset vectorEdgar E. Iglesias2014-05-131-0/+2
| | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-131-1/+1
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-1/+1
| | | | | | | | Most targets were using offsetof(CPUFooState, breakpoints) to determine how much of CPUFooState to clear on reset. Use the next field after CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber2014-03-131-1/+3
| | | | | | | | Note that while such functions may exist both for *-user and softmmu, only *-user uses the CPUState hook, while softmmu reuses the prototype for calling it directly. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber2014-03-131-0/+6
| | | | | | | | | Default to false. Tidy variable naming and inline cast uses while at it. Tested-by: Jia Liu <proljc@gmail.com> (or32) Signed-off-by: Andreas Färber <afaerber@suse.de>
* Microblaze: Convert Microblaze-pic handling to GPIOsAlistair Francis2014-01-141-0/+21
| | | | | | | | | | | | | | | This patch uses inbound GPIO lines (IRQ and FIR) for interrupts instead of using the old pic_cpu method, which doesn't correspond to real hardware. This creates the CPU's inbound IRQ and FIR GPIO lines and updates the Microblaze boards to use this new method. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Suggested-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reveiwed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber2013-07-291-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c643bed99 moved qemu_init_vcpu() calls to common CPUState code. This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed". The reason for the failure is that CPUClass::kvm_fd is not yet initialized in the following call graph: ->x86_cpu_realizefn ->x86_cpu_apic_realize ->qdev_init ->device_set_realized ->device_reset (hotplugged == 1) ->apic_reset_common ->vapic_base_update ->kvm_apic_vapic_base_update This causes attempted KVM vCPU ioctls to fail. By contrast, in the non-hotplug case the APIC is reset much later, when the vCPU is already initialized. As a quick and safe solution, move the qemu_init_vcpu() call back into the targets' realize functions. Reported-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Acked-by: Igor Mammedov <imammedo@redhat.com> (for i386) Tested-by: Jia Liu <proljc@gmail.com> (for openrisc) Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber2013-07-271-0/+2
| | | | | | | | Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber2013-07-261-0/+1
| | | | | | | | | | | | | CPUState::gdb_num_regs replaces num_g_regs. CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS. Allows building gdb_register_coprocessor() for xtensa, too. As a side effect this should fix coprocessor register numbering for SMP. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber2013-07-231-1/+4
| | | | | | | | | | | | Change breakpoint_invalidate() argument to CPUState alongside. Since all targets now assign a softmmu-only field, we can drop helpers cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd(). Prepares for changing cpu_memory_rw_debug() argument to CPUState. Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()Andreas Färber2013-07-231-0/+8
| | | | | | | This moves setting the Program Counter from gdbstub into target code. Use vaddr type as upper-bound replacement for target_ulong. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move reset logging to CPUStateAndreas Färber2013-07-091-5/+0
| | | | | | | | | | | x86 was using additional CPU_DUMP_* flags, so make that configurable in CPUClass::reset_dump_flags. This adds reset logging for alpha, unicore32 and xtensa. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
* log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber2013-07-091-1/+1
| | | | | | | | | | | | | | | | Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no longer needed. Add documentation and make the functions available through qemu/log.h outside NEED_CPU_H to allow use in qom/cpu.c. Moving them to qom/cpu.h was not yet possible due to convoluted include paths, so that some devices grow an implicit and unneeded dependency on qom/cpu.h for now. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> [AF: Simplified mb_cpu_do_interrupt() and do_interrupt_all() changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Turn cpu_unassigned_access() into a CPUState hookAndreas Färber2013-06-281-1/+1
| | | | | | | Use it for all targets, but be careful not to pass invalid CPUState. cpu_single_env can be NULL, e.g. on Xen. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Change qemu_init_vcpu() argument to CPUStateAndreas Färber2013-06-281-1/+0
| | | | | | | | This allows to move the call into CPUState's realizefn. Therefore move the stub into libqemustub.a. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber2013-06-281-0/+1
| | | | | | | | | Make cpustats monitor command available unconditionally. Prepares for changing kvm_handle_internal_error() and kvm_cpu_exec() arguments to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
* microblaze: Add internal base vectors regEdgar E. Iglesias2013-04-261-0/+8
| | | | | | | Configurable at CPU synthesis/instantiation. Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-121-0/+1
| | | | | | | | | | This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Add CPUArchState pointer to CPUStateAndreas Färber2013-02-161-0/+2
| | | | | | | | | | | | The target-specific ENV_GET_CPU() macros have allowed us to navigate from CPUArchState to CPUState. The reverse direction was not supported. Avoid introducing CPU_GET_ENV() macros by initializing an untyped pointer that is initialized in derived instance_init functions. The field may not be called "env" due to it being poisoned. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-microblaze: Move TCG initialization to MicroBlazeCPU initfnAndreas Färber2013-02-161-0/+6
| | | | | | | | | Split off TCG initialization from cpu_mb_init() into mb_tcg_init() to call it from the initfn. Ensures that a QOM-created MicroBlazeCPU is usable. Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-microblaze: Introduce QOM realizefn for MicroBlazeCPUAndreas Färber2013-02-161-0/+14
| | | | | | Introduce realizefn and set realized = true from cpu_mb_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-microblaze: Mark as unmigratableAndreas Färber2013-02-011-0/+9
| | | | | | | | | | | cpu_{save,load} were no-ops, so de facto it is unmigratable and no backwards compatibility to keep. Therefore mark the MicroBlazeCPU as unmigratable at device level the QOM way and suppress "cpu_common" VMState registration by dropping CPU_SAVE_VERSION. Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Juan Quintela <quintela@redhat.com>
* cpu: Move cpu_index field to CPUStateAndreas Färber2013-01-151-1/+1
| | | | | | | | | | | | | Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-microblaze: lwx/swx: first implementationPeter A. G. Crosthwaite2012-06-041-0/+1
| | | | | Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* target-microblaze: QOM'ify CPU initAndreas Färber2012-04-241-0/+11
| | | | | | | | Move code from cpu_mb_init() to a QOM initfn. Signed-off-by: Andreas Färber <afaerber@suse.de> Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> [AF: Leave cpu_reset() call in cpu_mb_init()]
* target-microblaze: QOM'ify CPU resetAndreas Färber2012-04-241-1/+50
| | | | | | | Move code from cpu_state_reset() to QOM mb_cpu_reset(). Signed-off-by: Andreas Färber <afaerber@suse.de> Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
* target-microblaze: QOM'ify CPUAndreas Färber2012-04-241-0/+59
Embed CPUMBState as first member of QOM MicroBlazeCPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> [AF: Updated cpu.c to include cpu-qom.h indirectly via cpu.h]
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