summaryrefslogtreecommitdiffstats
path: root/target-lm32/helper.c
Commit message (Collapse)AuthorAgeFilesLines
* cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber2013-07-231-2/+4
| | | | | | | | | | | | Change breakpoint_invalidate() argument to CPUState alongside. Since all targets now assign a softmmu-only field, we can drop helpers cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd(). Prepares for changing cpu_memory_rw_debug() argument to CPUState. Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
* log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber2013-07-091-2/+2
| | | | | | | | | | | | | | | | Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no longer needed. Add documentation and make the functions available through qemu/log.h outside NEED_CPU_H to allow use in qom/cpu.c. Moving them to qom/cpu.h was not yet possible due to convoluted include paths, so that some devices grow an implicit and unneeded dependency on qom/cpu.h for now. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> [AF: Simplified mb_cpu_do_interrupt() and do_interrupt_all() changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-lm32: fix debug memory accessMichael Walle2013-03-181-1/+6
| | | | | | | | CPU models which have the LM32_FLAG_IGNORE_MSB flag set will shadow the lower 2GB to the upper 2GB memory space. This will fix the debug memory access used by qemu console and GDB to match this behaviour. Signed-off-by: Michael Walle <michael@walle.cc>
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-121-1/+4
| | | | | | | | | | This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-lm32: Move TCG initialization to LM32CPU initfnAndreas Färber2013-02-161-6/+0
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-lm32: Introduce QOM realizefn for LM32CPUAndreas Färber2013-02-161-2/+2
| | | | | | | | Introduce a realizefn and set realized = true in cpu_lm32_init(). Also move cpu_reset() call from initfn to realizefn. Signed-off-by: Andreas Färber <afaerber@suse.de>
* misc: move include files to include/qemu/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-231-1/+1
| | | | | | | | | | | | | | | target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Kill off cpu_state_reset()Andreas Färber2012-06-041-6/+0
| | | | | | | | | | | | | | | | | In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset() was renamed to cpu_state_reset(), to allow introducing a new cpu_reset() that would operate on QOM objects. All callers have been updated except for one in target-mips, so drop all implementations except for the one in target-mips and move the declaration there until MIPSCPU reset can be fully QOM'ified. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris) Acked-by: Alexander Graf <agraf@suse.de> (for ppc) Acked-by: Blue Swirl <blauwirbel@gmail.com>
* target-lm32: Let cpu_lm32_init() return LM32CPUAndreas Färber2012-06-041-2/+2
| | | | | | | | | | | Make the include paths for cpu-qom.h consistent to allow using LM32CPU in cpu.h. Turn cpu_init macro into a static inline function returning CPULM32State for backwards compatibility. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc>
* target-lm32: QOM'ify CPU resetAndreas Färber2012-04-121-9/+1
| | | | | | | Move code from cpu_state_reset() into QOM lm32_cpu_reset(). Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc>
* target-lm32: QOM'ify CPU initAndreas Färber2012-04-121-3/+0
| | | | | | | | Move code from cpu_lm32_init() to an initfn; call cpu_reset() instead of cpu_state_reset(). Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc>
* target-lm32: QOM'ify CPUAndreas Färber2012-04-121-1/+3
| | | | | | | | Embed CPULM32State as first member of QOM LM32CPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc>
* target-lm32: init tcg only if availableMichael Walle2012-03-311-1/+1
| | | | | | Once qtest support for target-lm32 arrives, tcg may be disabled. Signed-off-by: Michael Walle <michael@walle.cc>
* target-lm32: Don't overuse CPUStateAndreas Färber2012-03-141-8/+8
| | | | | | | | | Scripted conversion: sed -i "s/CPUState/CPULM32State/g" target-lm32/*.[hc] sed -i "s/#define CPULM32State/#define CPUState/" target-lm32/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
* Rename cpu_reset() to cpu_state_reset()Andreas Färber2012-03-141-2/+2
| | | | | | | | | | Frees the identifier cpu_reset for QOM CPUs (manual rename). Don't hide the parameter type behind explicit casts, use static functions with strongly typed argument to indirect. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
* target-lm32: Clean includesStefan Weil2012-02-281-5/+0
| | | | | | | config.h was missing in cpu.h. Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Stefan Weil <sw@weilnetz.de>
* lm32: add missing qemu_init_vcpu() callMichael Walle2011-10-031-0/+1
| | | | Signed-off-by: Michael Walle <michael@walle.cc>
* Use glib memory allocation and free functionsAnthony Liguori2011-08-201-1/+1
| | | | | | qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl2011-08-071-1/+1
| | | | | | | | | Parameter is_softmmu (and its evil mutant twin brother is_softmuu) is not used in cpu_*_handle_mmu_fault() functions, remove them and adjust callers. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Remove exec-all.h include directivesBlue Swirl2011-06-261-1/+0
| | | | | | Most exec-all.h include directives are now useless, remove them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* lm32: fix exception handlingMichael Walle2011-05-031-5/+1
| | | | | | | | | | Global interrupt enable bit is already saved within the exception handler helper routine. Thus remove extra code in translation routines. Additionally, debug exceptions has always DEBA as base address. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* lm32: translation routinesMichael Walle2011-03-071-0/+259
This patch adds the main translation routine. All opcodes of the LatticeMico32 processor are supported and translated to TCG ops. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
OpenPOWER on IntegriCloud