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* kvm: use qemu_free consistentlyPaolo Bonzini2011-05-021-1/+1
| | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: add kvmclock to its second bitGlauber Costa2011-05-021-1/+1
| | | | | | | | | We have two bits that can represent kvmclock in cpuid. They signal the guest which msr set to use. When we tweak flags involving this value - specially when we use "-", we have to act on both. Signed-off-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* x86: Allow multiple cpu feature matches of lookup_featureJan Kiszka2011-05-021-6/+8
| | | | | | | | | kvmclock is represented by two feature bits. Therefore, lookup_feature needs to continue its search even after the first match. Enhance it accordingly and switch to a bool return type at this chance. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: use kernel-provided para_features instead of statically coming up with ↵Glauber Costa2011-05-021-29/+49
| | | | | | | | | | | | new capabilities Use the features provided by KVM_GET_SUPPORTED_CPUID directly to mask out features from guest-visible cpuid. The old get_para_features() mechanism is kept for older kernels that do not implement it. Signed-off-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* target-i386: fix constants wrt softfloatAurelien Jarno2011-04-252-7/+25
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: fix helper_fprem() and helper_fprem1() wrt softfloatAurelien Jarno2011-04-251-20/+28
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: fix logarithmic and trigonometric helpers wrt softfloatAurelien Jarno2011-04-251-26/+26
| | | | | | | | Use the new CPU86_LDouble <-> double conversion functions to make logarithmic and trigonometric helpers working with softfloat. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: add CPU86_LDouble <-> double conversion functionsAurelien Jarno2011-04-251-0/+22
| | | | | | | | | Add functions to convert CPU86_LDouble to double and vice versa. They are going to be used to implement logarithmic and trigonometric function until softfloat implement them. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: replace approx_rsqrt and approx_rcp by softfloat opsAurelien Jarno2011-04-252-22/+24
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: fix helper_fsqrt() wrt softfloatAurelien Jarno2011-04-252-5/+6
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: fix helper_fdiv() wrt softfloatAurelien Jarno2011-04-252-2/+7
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: fix helper_fxtract() wrt softfloatAurelien Jarno2011-04-251-7/+16
| | | | | | | | | | With softfloat it's not possible to play with the overflow of an unsigned value to get the 0 case partially correct. Use a special case for that. Using a division to generate an infinity is the easiest way that works for both softfloat and softfloat-native. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: fix helper_fbld_ST0() wrt softfloatAurelien Jarno2011-04-251-3/+4
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: fix helper_fscale() wrt softfloatAurelien Jarno2011-04-252-1/+10
| | | | | | | | | Use the scalbn softfloat function to implement helper_fscale(). This fixes corner cases (e.g. NaN) and makes a few more GNU libc math tests to pass. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Remove unused function parameter from cpu_restore_stateStefan Weil2011-04-201-1/+1
| | | | | | | | | The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
* Remove unused function parameters from gen_pc_load and rename the functionStefan Weil2011-04-201-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Function gen_pc_load was introduced in commit d2856f1ad4c259e5766847c49acbb4e390731bd4. The only reason for parameter searched_pc was a debug statement in target-i386/translate.c. Parameter puc was needed by target-sparc until commit d7da2a10402f1644128b66414ca8f86bdea9ae7c. Remove searched_pc from the debug statement and remove both parameters from the parameter list of gen_pc_load. As the function name gen_pc_load was also misleading, it is now called restore_state_to_opc. This new name was suggested by Peter Maydell, thanks. v2: Remove last parameter, too, and rename the function. v3: Fix [] typo in target-arm/translate.c. Fix wrong SHA1 object name in commit message (copy+paste error). Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
* softfloat: rename float*_eq() into float*_eq_quiet()Aurelien Jarno2011-04-171-4/+4
| | | | | | | | | | | | | | float*_eq functions have a different semantics than other comparison functions. Fix that by first renaming float*_quiet() into float*_eq_quiet(). Note that it is purely mechanical, and the behaviour should be unchanged. That said it clearly highlight problems due to this different semantics, they are fixed later in this patch series. Cc: Alexander Graf <agraf@suse.de> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: fix CMPUNORDPS/D and CMPORDPS/D instructionsAurelien Jarno2011-04-171-2/+2
| | | | | | | | SSE instructions CMPUNORDPS/D and CMPORDPS/D do not trigger an invalid exception if operands are qNANs. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: add floatx_{add,mul,sub} and use themAurelien Jarno2011-04-172-10/+14
| | | | | | | | Add floatx_{add,mul,sub} defines, and use them instead of using direct C operations. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: use float unions from cpu-all.hAurelien Jarno2011-04-171-25/+2
| | | | | | | | Use float unions from cpu-all.h instead of redefining new (wrong for arm) ones in target-i386. This also allows building cpu-exec.o with softfloat. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: use CPU_LDoubleU instead of a private unionAurelien Jarno2011-04-171-9/+3
| | | | | | | | | | | Use CPU_LDoubleU in cpu_dump_state() instead of redefining a union for doing the conversion. Based on a patch from Laurent Vivier <laurent@vivier.eu>. Cc: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Fix conversions from pointer to tcg_target_longStefan Weil2011-04-101-1/+1
| | | | | | | | | | | | tcg_gen_exit_tb takes a parameter of type tcg_target_long, so the type casts of pointer to long should be replaced by type casts of pointer to tcg_target_long (suggested by Blue Swirl). These changes are needed for build environments where sizeof(long) != sizeof(void *), especially for w64. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Revert "x86: Save/restore PAT MSR"Anthony Liguori2011-03-221-2/+0
| | | | | | | | | | | | | This reverts commit c995b495b9d6e60ab1e390bd398a22425d0b3c8c. From Jan Kiszka: Ouch, indeed. Moreover, CPU_SAVE_VERSION was not updated (likely the reason for the breakage). Thanks for debugging this! Anthony (or whoever), please revert this unneeded commit in qemu.git. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* kvm: x86: Push kvm_arch_debug to kvm_arch_handle_exitJan Kiszka2011-03-161-9/+16
| | | | | | | | There are no generic bits remaining in the handling of KVM_EXIT_DEBUG. So push its logic completely into arch hands, i.e. only x86 so far. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: x86: Reorder functions in kvm.cJan Kiszka2011-03-161-54/+54
| | | | | | | | Required for next patch which will access guest debug services from kvm_arch_handle_exit. No functional changes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: Align kvm_arch_handle_exit to kvm_cpu_exec changesJan Kiszka2011-03-161-4/+4
| | | | | | | | | | | Make the return code of kvm_arch_handle_exit directly usable for kvm_cpu_exec. This is straightforward for x86 and ppc, just s390 would require more work. Avoid this for now by pushing the return code translation logic into s390's kvm_arch_handle_exit. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Alexander Graf <agraf@suse.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: x86: Synchronize PAT MSR with the kernelJan Kiszka2011-03-161-0/+5
| | | | | Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* x86: Save/restore PAT MSRJan Kiszka2011-03-161-0/+2
| | | | | Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* x86: Properly reset PAT MSRJan Kiszka2011-03-163-3/+7
| | | | | | | | Conforming to the Intel spec, set the power-on value of PAT also on reset, but save it across INIT. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: x86: Do not leave halt if interrupts are disabledJan Kiszka2011-03-161-1/+3
| | | | | | | | When an external interrupt is pending but IF is cleared, we must not leave the halt state prematurely. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* KVM, MCE, unpoison memory address across rebootHuang Ying2011-03-151-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In Linux kernel HWPoison processing implementation, the virtual address in processes mapping the error physical memory page is marked as HWPoison. So that, the further accessing to the virtual address will kill corresponding processes with SIGBUS. If the error physical memory page is used by a KVM guest, the SIGBUS will be sent to QEMU, and QEMU will simulate a MCE to report that memory error to the guest OS. If the guest OS can not recover from the error (for example, the page is accessed by kernel code), guest OS will reboot the system. But because the underlying host virtual address backing the guest physical memory is still poisoned, if the guest system accesses the corresponding guest physical memory even after rebooting, the SIGBUS will still be sent to QEMU and MCE will be simulated. That is, guest system can not recover via rebooting. In fact, across rebooting, the contents of guest physical memory page need not to be kept. We can allocate a new host physical page to back the corresponding guest physical address. This patch fixes this issue in QEMU-KVM via calling qemu_ram_remap() to clear the corresponding page table entry, so that make it possible to allocate a new page to recover the issue. [ Jan: rebasing and tiny cleanups] Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: x86: Fail kvm_arch_init_vcpu if MCE initialization failsJan Kiszka2011-03-151-13/+17
| | | | | | | | | | | There is no reason to continue if the kernel claims to support MCE but then fails to process our request. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: x86: Clean up kvm_setup_mceJan Kiszka2011-03-151-7/+4
| | | | | | | | | | | | There is nothing to abstract here. Fold kvm_setup_mce into its caller and fix up the error reporting (return code of kvm_vcpu_ioctl holds the error value). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: x86: Consolidate TCG and KVM MCE injection codeJan Kiszka2011-03-153-260/+37
| | | | | | | | | | | | | | | | This switches KVM's MCE injection path to cpu_x86_inject_mce, both for SIGBUS and monitor initiated events. This means we prepare the MCA MSRs in the VCPUState also for KVM. We have to drop the MSRs writeback restrictions for this purpose which is now safe as every uncoordinated MSR injection is removed with this patch. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* x86: Run qemu_inject_x86_mce on target VCPUJan Kiszka2011-03-151-29/+58
| | | | | | | | | We will use the current TCG-only MCE injection path for KVM as well, and then this read-modify-write of the target VCPU state has to be performed synchronously in the corresponding thread. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: x86: Inject pending MCE events on state writebackJan Kiszka2011-03-151-0/+60
| | | | | | | | | | | | | | | | | | | | | The current way of injecting MCE events without updating of and synchronizing with the CPUState is broken and causes spurious corruptions of the MCE-related parts of the CPUState. As a first step towards a fix, enhance the state writeback code with support for injecting events that are pending in the CPUState. A pending exception will then be signaled via cpu_interrupt(CPU_INTERRUPT_MCE). And, just like for TCG, we need to leave the halt state when CPU_INTERRUPT_MCE is pending (left broken for the to-be-removed old KVM code). This will also allow to unify TCG and KVM injection code. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: Rename kvm_arch_process_irqchip_events to async_eventsJan Kiszka2011-03-151-1/+1
| | | | | | | We will broaden the scope of this function on x86 beyond irqchip events. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: x86: Move MCE functions togetherJan Kiszka2011-03-151-175/+171
| | | | | | | | | | | Pure function suffling to avoid multiple #ifdef KVM_CAP_MCE sections, no functional changes. While at it, annotate some #ifdef sections. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* x86: Optionally avoid injecting AO MCEs while others are pendingJan Kiszka2011-03-152-8/+23
| | | | | | | | | | | | Allow to tell cpu_x86_inject_mce that it should ignore Action Optional MCE events when the target VCPU is still processing another one. This will be used by KVM soon. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* x86: Refine error reporting of MCE injection servicesJan Kiszka2011-03-152-36/+49
| | | | | | | | | | | | | | As this service is used by the human monitor, make sure that errors get reported to the right channel, and also raise the verbosity. This requires to move Monitor typedef in qemu-common.h to resolve the include dependency. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* x86: Small cleanups of MCE helpersJan Kiszka2011-03-152-17/+29
| | | | | | | | | | | Fix some code style issues, use proper headers, and align to cpu_x86 naming scheme. No functional changes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* x86: Perform implicit mcg_status resetJan Kiszka2011-03-152-3/+2
| | | | | | | | | | Reorder mcg_status in CPUState to achieve automatic clearing on reset. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* x86: Account for MCE in cpu_has_workJan Kiszka2011-03-151-9/+6
| | | | | | | | | | | MCEs can be injected asynchronously, so they can also terminate the halt state. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* inline cpu_halted into sole callerPaolo Bonzini2011-03-131-12/+0
| | | | | | | | All implementations are now the same, and there is only one caller, so inline the function there. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Refactor thread retrieval and checkJan Kiszka2011-03-131-2/+2
| | | | | | | | | | | | | We have qemu_cpu_self and qemu_thread_self. The latter is retrieving the current thread, the former is checking for equality (using CPUState). We also have qemu_thread_equal which is only used like qemu_cpu_self. This refactors the interfaces, creating qemu_cpu_is_self and qemu_thread_is_self as well ass qemu_thread_get_self. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* kvm: x86: Catch and report failing IRQ and NMI injectionsJan Kiszka2011-02-141-3/+13
| | | | | | | | We do not need to abort, but the user should be notified that weird things go on. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: Drop return values from kvm_arch_pre/post_runJan Kiszka2011-02-141-6/+2
| | | | | | | | | We do not check them, and the only arch with non-empty implementations always returns 0 (this is also true for qemu-kvm). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Alexander Graf <agraf@suse.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: x86: Prepare VCPU loop for in-kernel irqchipJan Kiszka2011-02-141-31/+38
| | | | | | | | | Effectively no functional change yet as kvm_irqchip_in_kernel still only returns 0, but this patch will allow qemu-kvm to adopt the VCPU loop of upsteam KVM. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: Separate TCG from KVM cpu executionJan Kiszka2011-02-141-3/+3
| | | | | | | | | | | | | | | Mixing up TCG bits with KVM already led to problems around eflags emulation on x86. Moreover, quite some code that TCG requires on cpu enty/exit is useless for KVM. So dispatch between tcg_cpu_exec and kvm_cpu_exec as early as possible. The core logic of cpu_halted from cpu_exec is added to kvm_arch_process_irqchip_events. Moving away from cpu_exec makes exception_index meaningless for KVM, we can simply pass the exit reason directly (only "EXCP_DEBUG vs. rest" is relevant). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* kvm: make tsc stable over migration and machine startGlauber Costa2011-02-142-1/+18
| | | | | | | | | | | | | | If the machine is stopped, we should not record two different tsc values upon a save operation. The same problem happens with kvmclock. But kvmclock is taking a different diretion, being now seen as a separate device. Since this is unlikely to happen with the tsc, I am taking the approach here of simply registering a handler for state change, and using a per-CPUState variable that prevents double updates for the TSC. Signed-off-by: Glauber Costa <glommer@redhat.com> CC: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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