index
:
hqemu
2.5.1_overlay
2.5_overlay
2.6_overlay
master
HQEMU
Raptor Engineering, LLC
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
target-i386
Commit message (
Expand
)
Author
Age
Files
Lines
...
*
converted INTO/CMPXCHG8B to TCG
bellard
2008-05-21
4
-20
/
+12
*
converted BCD ops to TCG
bellard
2008-05-21
2
-38
/
+6
*
converted MUL/IMUL to TCG
bellard
2008-05-21
3
-133
/
+129
*
converted string OPs and LOOP insns to TCG
bellard
2008-05-18
3
-294
/
+147
*
fixed INC/DEC condition codes
bellard
2008-05-18
1
-1
/
+1
*
converted sign extension ops to TCG
bellard
2008-05-17
2
-76
/
+31
*
MONITOR insn address generation fix - converted XLAT to TCG
bellard
2008-05-17
2
-40
/
+20
*
BSR/BSF TCG conversion
bellard
2008-05-17
4
-72
/
+54
*
converted bit test operations to TCG
bellard
2008-05-17
2
-98
/
+53
*
moved eflags computation outside op.c
bellard
2008-05-17
4
-293
/
+296
*
converted adc, sbb, cmpxchg to TCG
bellard
2008-05-17
3
-305
/
+151
*
converted condition code supprot to TCG - converted shift ops to TCG
bellard
2008-05-17
9
-1132
/
+762
*
converted more helpers to TCG - fixed some SVM issues
bellard
2008-05-15
10
-485
/
+404
*
i386 specific TODO
bellard
2008-05-13
1
-0
/
+29
*
compilation fix
bellard
2008-05-12
1
-1
/
+3
*
converted more helpers to TCG
bellard
2008-05-12
5
-647
/
+498
*
removed unused code
bellard
2008-05-12
1
-6
/
+0
*
FPU fixes
bellard
2008-05-12
1
-11
/
+11
*
converted x87 FPU ops to TCG
bellard
2008-05-12
5
-945
/
+756
*
converted SSE/MMX ops to TCG
bellard
2008-05-12
6
-671
/
+715
*
use TCG for MMX/SSE memory accesses
bellard
2008-05-12
3
-221
/
+58
*
char is only for strings
bellard
2008-05-12
1
-3
/
+3
*
no need to define global registers in cpu-exec.c
bellard
2008-05-10
1
-41
/
+4
*
Correctly save and restore env->a20_mask now that it is a 64-bit
aurel32
2008-05-04
1
-2
/
+6
*
remove target ifdefs from vl.c
aurel32
2008-05-04
1
-0
/
+264
*
Factorize code in translate.c
aurel32
2008-04-28
1
-0
/
+23
*
Use correct types to enable > 2G support, based on a patch from
aurel32
2008-04-27
2
-3
/
+26
*
Fix PHYS_ADDR_MASK: upper bits of a PTE are reserved so they are 52 bits
aurel32
2008-04-22
1
-1
/
+2
*
x86/x86-64 MMU PAE fixes
aurel32
2008-04-22
2
-20
/
+24
*
x86: Introduce CPU_INTERRUPT_NMI
aurel32
2008-04-13
3
-2
/
+7
*
Remove osdep.c/qemu-img code duplication
aurel32
2008-04-11
1
-0
/
+1
*
Remove unused phys_ram_base definition from target-i386/helper.c.
aurel32
2008-04-11
1
-1
/
+0
*
Check for 3DNow! CPUID at translation time
aurel32
2008-04-09
1
-2
/
+13
*
Fix typo in x86 CPU definitions introduced in r4181
aurel32
2008-04-08
1
-1
/
+1
*
Remove hardcoded values in x86 CPU definitions
aurel32
2008-04-08
1
-4
/
+11
*
3DNow! instruction set emulation
aurel32
2008-04-08
4
-10
/
+246
*
x86-64: recompute DF after eflags has been modified when emulating SYSCALL
aurel32
2008-03-28
1
-0
/
+1
*
Fix some functions declared () rather than (void) (Ian Jackson)
blueswir1
2008-03-09
2
-2
/
+2
*
More helper types, rearrange generic definitions
blueswir1
2008-02-24
1
-64
/
+0
*
Add TCG variable opaque type.
pbrook
2008-02-03
1
-3
/
+3
*
NMI and INTR events injection should not be handled as software interrupts (B...
balrog
2008-02-03
1
-2
/
+2
*
Make SVM env->cr[8] a valid register (patch from TeLeMan).
balrog
2008-02-03
2
-2
/
+6
*
use the TCG code generator
bellard
2008-02-01
6
-1160
/
+794
*
Correct the max cpuid level for each x86 cpu model (Dan Kenigsberg).
balrog
2007-12-24
1
-1
/
+8
*
SVM enabled processor should provide cpuid Fn8000_000A (Bernhard Kauer).
balrog
2007-12-24
2
-1
/
+7
*
Fix cmpxchg8b translation (Bernhard Kauer).
balrog
2007-12-24
1
-1
/
+1
*
Make SVM IOIO intercept check all needed bits, by Bernhard Kauer.
balrog
2007-12-09
1
-1
/
+2
*
Add rdpmc SVM intercept, by Bernhard Kauer.
balrog
2007-12-09
4
-0
/
+22
*
Fix spelling typo, by Dan Kenigsberg.
ths
2007-12-09
1
-1
/
+1
*
Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.
ths
2007-12-09
1
-0
/
+1
[prev]
[next]