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* target-i386: Implement FSGSBASERichard Henderson2019-11-294-2/+50
* target-i386: Enable CR4/XCR0 features for user-modeRichard Henderson2019-11-291-2/+22
* target-i386: Clear bndregs during legacy near jumpsRichard Henderson2019-11-293-0/+29
* target-i386: Implement BNDLDX, BNDSTXRichard Henderson2019-11-293-0/+158
* target-i386: Update BNDSTATUS for exceptions raised by BOUNDRichard Henderson2019-11-291-0/+6
* target-i386: Implement BNDCL, BNDCU, BNDCNRichard Henderson2019-11-293-1/+53
* target-i386: Implement BNDMOVRichard Henderson2019-11-291-1/+72
* target-i386: Implement BNDMKRichard Henderson2019-11-291-1/+57
* target-i386: Split up gen_lea_modrmRichard Henderson2019-11-291-114/+85
* target-i386: Perform set/reset_inhibit_irq inlineRichard Henderson2019-11-293-21/+28
* target-i386: Enable control registers for MPXRichard Henderson2019-11-2910-26/+189
* target-i386: Implement XSAVEOPTRichard Henderson2019-11-294-11/+43
* target-i386: Add XSAVE extensionRichard Henderson2019-11-296-24/+241
* target-i386: Rearrange processing of 0F AERichard Henderson2019-11-291-52/+72
* target-i386: Rearrange processing of 0F 01Richard Henderson2019-11-291-223/+247
* target-i386: Split fxsave/fxrstor implementationRichard Henderson2019-11-293-82/+101
* target-i386: fix PSE36 modePaolo Bonzini2019-11-291-2/+2
* target-i386: Deconstruct the cpu_T arrayRichard Henderson2019-11-291-614/+624
* target-i386: Tidy gen_add_A0_imRichard Henderson2019-11-291-22/+5
* target-i386: Rewrite leaveRichard Henderson2019-11-291-14/+15
* target-i386: Rewrite gen_enter inlineRichard Henderson2019-11-293-137/+34
* target-i386: Use gen_lea_v_seg in pusha/popaRichard Henderson2019-11-291-27/+23
* target-i386: Access segs via TCG registersRichard Henderson2019-11-291-24/+28
* target-i386: Use gen_lea_v_seg in stack subroutinesRichard Henderson2019-11-291-39/+13
* target-i386: Use gen_lea_v_seg in gen_lea_modrmRichard Henderson2019-11-291-59/+23
* target-i386: Introduce mo_stacksizeRichard Henderson2019-11-291-14/+10
* target-i386: Create gen_lea_v_segRichard Henderson2019-11-291-107/+53
* tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson2019-11-291-5/+5
* tcg: Remove lingering references to gen_opc_bufRichard Henderson2019-11-291-2/+1
* qom: Swap 'name' next to visitor in ObjectPropertyAccessorEric Blake2019-11-291-34/+33
* qapi: Swap visit_* arguments for consistent 'name' placementEric Blake2019-11-291-15/+15
* qom: Use typedef for VisitorEric Blake2019-11-291-2/+2
* log: do not unnecessarily include qom/cpu.hPaolo Bonzini2019-11-293-0/+3
* x86: Clean up includesPeter Maydell2019-11-2920-7/+20
* target-i386: Add PKU and and OSPKE supportHuaitong Han2019-11-294-1/+56
* target-i386: Add support to migrate vcpu's TSC rateHaozhong Zhang2019-11-294-1/+41
* target-i386: Reorganize TSC rate setting codeHaozhong Zhang2019-11-291-7/+33
* target-i386: Fallback vcpu's TSC rate to value returned by KVMHaozhong Zhang2019-11-291-0/+14
* target-i386: Add suffixes to MMReg struct fieldsEduardo Habkost2019-11-291-33/+33
* target-i386: Define MMREG_UNION macroEduardo Habkost2019-11-291-16/+11
* target-i386: Define MMXReg._d fieldEduardo Habkost2019-11-291-1/+2
* target-i386: Rename XMM_[BWLSDQ] helpers to ZMM_*Eduardo Habkost2019-11-298-300/+300
* target-i386: Rename struct XMMReg to ZMMRegEduardo Habkost2019-11-295-115/+115
* target-i386: Use a _q array on MMXReg tooEduardo Habkost2019-11-291-2/+2
* target-i386/ops_sse.h: Use MMX_Q macroEduardo Habkost2019-11-291-1/+1
* target-i386: Rename optimize_flags_init()Eduardo Habkost2019-11-293-3/+3
* exec.c: Allow target CPUs to define multiple AddressSpacesPeter Maydell2019-11-291-0/+1
* exec.c: Don't set cpu->as until cpu_address_space_initPeter Maydell2019-11-291-2/+4
* target-i386: do not duplicate page protection checksPaolo Bonzini2019-11-291-42/+23
* target-i386: kvm: clear unusable segments' flags in migrationMichael Chapman2019-11-291-9/+13
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