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* cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to genericPeter Maydell2012-10-055-11/+7
| | | | | | | | | | | Move the DUMP_FPU and DUMP_CCOP flags for cpu_dump_state() from being x86-specific flags to being generic ones. This allows us to drop some TARGET_I386 ifdefs in various places, and means that we can (potentially) be more consistent across architectures about which monitor commands or debug abort printouts include FPU register contents and info about QEMU's condition-code optimisations. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* x86: Implement SMEP and SMAPH. Peter Anvin2012-10-016-49/+207
| | | | | | | | | | | | | | | | | | | | | | This patch implements Supervisor Mode Execution Prevention (SMEP) and Supervisor Mode Access Prevention (SMAP) for x86. The purpose of the patch, obviously, is to help kernel developers debug the support for those features. A fair bit of the code relates to the handling of CPUID features. The CPUID code probably would get greatly simplified if all the feature bit words were unified into a single vector object, but in the interest of producing a minimal patch for SMEP/SMAP, and because I had very limited time for this project, I followed the existing style. [ v2: don't change the definition of the qemu64 CPU shorthand, since that breaks loading old snapshots. Per Anthony Liguori this can be fixed once the CPU feature set is snapshot. Change the coding style slightly to conform to checkpatch.pl. ] Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* i386: -cpu help: remove reference to specific CPUID leaves/registersEduardo Habkost2012-09-301-4/+4
| | | | | | | | | | The -cpu configuration interface is based on a list of feature names or properties, on a single namespace, so there's no need to mention on which CPUID leaf/register each flag is located. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* i386: cpu: eliminate duplicate feature namesEduardo Habkost2012-09-301-8/+23
| | | | | | | | | | | | | | | | | Instead of having duplicate feature names on the ext2_feature array for the AMD feature bit aliases, we keep the feature names only on the feature_name[] array, and copy the corresponding bits to cpuid_ext2_features in case the CPU vendor is AMD. This will: - Make sure we don't set the feature bit aliases on Intel CPUs; - Make it easier to convert feature bits to CPU properties, as now we have a single bit on the x86_def_t struct for each CPU feature. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* i386: cpu: replace EXT2_FEATURE_MASK with CPUID_EXT2_AMD_ALIASESEduardo Habkost2012-09-301-9/+11
| | | | | | | | | Both constants have the same value, but CPUID_EXT2_AMD_ALIASES is defined without using magic numbers. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* i386: kvm: use a #define for the set of alias feature bitsEduardo Habkost2012-09-302-1/+13
| | | | | | | | | | | Instea of using a hardcoded hex constant, define CPUID_EXT2_AMD_ALIASES as the set of CPUID[8000_0001].EDX bits that on AMD are the same as the bits of CPUID[1].EDX. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-By: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* i386: kvm: bit 10 of CPUID[8000_0001].EDX is reservedEduardo Habkost2012-09-301-1/+1
| | | | | | | | | | | Bit 10 of CPUID[8000_0001].EDX is not defined as an alias of CPUID[1].EDX[10], so do not duplicate it on kvm_arch_get_supported_cpuid(). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-By: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson2012-09-271-1/+2
| | | | | | | | | | | For all targets that currently call tcg_gen_debug_insn_start, add CPU_LOG_TB_OP_OPT to the condition that gates it. This is useful for comparing optimization dumps, when the pre-optimization dump is merely noise. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori2012-09-251-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * stefanha/trivial-patches: w32: Always use standard instead of native format strings net/socket: Fix compiler warning (regression for MinGW) linux-user: Remove redundant null check and replace free by g_free qemu-timer: simplify qemu_run_timers TextConsole: saturate escape parameter in TTY_STATE_CSI curses: don't initialize curses when qemu is daemonized dtrace backend: add function to reserved words pflash_cfi01: Fix warning caused by unreachable code ioh3420: Remove unreachable code lm4549: Fix buffer overflow cadence_uart: Fix buffer overflow qemu-sockets: Fix potential memory leak qemu-ga: Remove unreachable code after g_error target-i386: Allow tsc-frequency to be larger then 2.147G
| * target-i386: Allow tsc-frequency to be larger then 2.147GDon Slutz2012-09-231-1/+1
| | | | | | | | | | | | | | | | The check using INT_MAX (2147483647) is wrong in this case. Signed-off-by: Fred Oliveira <foliveira@cloudswitch.com> Signed-off-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Stefan Hajnoczi <stefanha@gmail.com>
* | target-i386: Drop unused setscalar() macroAndreas Färber2012-09-211-12/+0
| | | | | | | | | | | | | | It was only used by now removed setfeatures() function. Suggested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* | target-i386: Kill cpudef config section supportEduardo Habkost2012-09-211-99/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It's nice to have a flexible system to maintain CPU models as data, but this is holding us from making improvements in the CPU code because it's not using the common infra-structure, and because the machine-type data is still inside C code. Users who want to configure CPU features directly may simply use the "-cpu" command-line option (and maybe an equivalent -device option in the future) to set CPU features. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* | target-i386: x86_cpudef_setup() coding style changeEduardo Habkost2012-09-211-6/+9
| | | | | | | | | | | | | | | | Make source code lines shorter. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* | target-i386: Move CPU models from cpus-x86_64.conf to CEduardo Habkost2012-09-211-0/+219
| | | | | | | | | | | | | | | | | | | | | | Those models are maintained by QEMU and may require compatibility code to be added when making some changes. Keeping the data in the C source code should make it simpler to handle those details. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* | target-i386: Add missing CPUID_* constantsEduardo Habkost2012-09-211-0/+22
| | | | | | | | | | | | | | | | Those constants will be used by new CPU model definitions. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* | Drop cpu_list_id macroPeter Maydell2012-09-212-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Since the only user of the extended cpu_list_id() format was the x86 ?model/?dump/?cpuid output, we can drop it completely. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* | target-i386: Fold -cpu ?cpuid, ?model output into -cpu help, drop ?dumpPeter Maydell2012-09-211-53/+11
|/ | | | | | | | | | | | | | | | | | | Commit c8057f95 (accidentally) disabled the ability to pass option strings starting with '?' to the target-specific cpu_list function, so the target-i386 specific "-cpu ?dump", "-cpu ?cpuid" and "-cpu ?model" stopped working. Since these options are undocumented and not used by libvirt, simply drop them completely rather than reinstating them with new style syntax. Instead, we fold the ?model and ?cpuid output into the output of the plain "-cpu help" output. The detailed output produced by ?dump is dropped. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* kvm: i386: Add services required for PCI device assignmentJan Kiszka2012-09-102-0/+163
| | | | | | | | | | These helpers abstract the interaction of upcoming pci-assign with the KVM kernel services. Put them under i386 only as other archs will implement device pass-through via VFIO and not this classic interface. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* w32: Fix broken buildStefan Weil2012-08-301-0/+2
| | | | | | | | Commit ef8621b1a3b199c348606c0a11a77d8e8bf135f1 added an include file which is not available for MinGW compilations. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* kvm: get/set PV EOI MSRMichael S. Tsirkin2012-08-293-0/+35
| | | | | | | | | Support get/set of new PV EOI MSR, for migration. Add an optional section for MSR value - send it out in case MSR was changed from the default value (0). Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* target-i386: disable pv eoi to fix migration across QEMU versionsAnthony Liguori2012-08-291-1/+12
| | | | | | | | | | | | | | | | | | | | | | We have a problem with how we handle migration with KVM paravirt features. We unconditionally enable paravirt features regardless of whether we know how to migrate them. We also don't tie paravirt features to specific machine types so an old QEMU on a new kernel would expose features that never existed. The 1.2 cycle is over and as things stand, migration is broken. Michael has another series that adds support for migrating PV EOI and attempts to make it work correctly for different machine types. After speaking with Michael on IRC, we agreed to take this patch plus 1 & 4 from his series. This makes sure QEMU can migrate PV EOI if it's enabled, but does not enable it by default. This also means that we won't unconditionally enable new features for guests future proofing us from this happening again in the future. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* target-i386/translate.c: mov to/from crN/drN: ignore mod bitsMatthew Ogilvie2012-08-241-4/+10
| | | | | | | | | | | | | > This instruction is always treated as a register-to-register (MOD = 11) > instruction, regardless of the encoding of the MOD field in the MODR/M > byte. Also, Microport UNIX System V/386 v 2.1 (ca 1987) runs fine on real Intel 386 and 486 CPU's (at least), but does not run in qemu without this patch. Signed-off-by: Matthew Ogilvie <mmogilvi_qemu@miniinfo.net> Signed-off-by: malc <av1474@comtv.ru>
* win32: provide separate macros for weak decls and definitionsAnthony Liguori2012-08-151-2/+2
| | | | | | | | mingw32 seems to want the declaration to also carry the weak attribute. Strangely, gcc on Linux absolutely does not want the declaration to be marked as weak. This may not be the right fix, but it seems to do the trick. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* x86: switch to AREG0 free modeBlue Swirl2012-08-149-199/+128
| | | | | | | | Add an explicit CPUX86State parameter instead of relying on AREG0. Remove temporary wrappers and switch to AREG0 free mode. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: avoid AREG0 in segmentation helpersBlue Swirl2012-08-144-160/+150
| | | | | | | | Add an explicit CPUX86State parameter instead of relying on AREG0. Rename remains of op_helper.c to seg_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: avoid AREG0 for misc helpersBlue Swirl2012-08-144-83/+84
| | | | | | Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: use wrappers for memory access helpersBlue Swirl2012-08-143-103/+126
| | | | | | Switch to wrapped versions of memory access functions. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: avoid AREG0 for SMM helpersBlue Swirl2012-08-144-13/+6
| | | | | | Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: avoid AREG0 for SVM helpersBlue Swirl2012-08-144-115/+110
| | | | | | Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: avoid AREG0 for integer helpersBlue Swirl2012-08-145-71/+88
| | | | | | Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: avoid AREG0 for condition code helpersBlue Swirl2012-08-1410-169/+179
| | | | | | Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: avoid AREG0 for FPU helpersBlue Swirl2012-08-148-876/+968
| | | | | | | | | | | Make FPU helpers take a parameter for CPUState instead of relying on global env. Introduce temporary wrappers for FPU load and store ops. Remove wrappers for non-AREG0 code. Don't call unconverted helpers directly. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Merge remote-tracking branch 'qmp/queue/qmp' into stagingAnthony Liguori2012-08-131-0/+22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * qmp/queue/qmp: (48 commits) target-ppc: add implementation of query-cpu-definitions (v2) target-i386: add implementation of query-cpu-definitions (v2) qapi: add query-cpu-definitions command (v2) compiler: add macro for GCC weak symbols qapi: add query-machines command qapi: mark QOM commands stable qmp: introduce device-list-properties command qmp: add SUSPEND_DISK event qmp: qmp-events.txt: add missing doc for the SUSPEND event qmp: qmp-events.txt: put events in alphabetical order qmp: emit the WAKEUP event when the guest is put to run qmp: don't emit the RESET event on wakeup from S3 scripts: qapi-commands.py: qmp-commands.h: include qdict.h docs: writing-qmp-commands.txt: update error section error, qerror: drop QDict member qerror: drop qerror_table and qerror_format() error, qerror: pass desc string to error calls error: drop error_get_qobject()/error_set_qobject() qemu-ga: switch to the new error format on the wire qmp: switch to the new error format on the wire ...
| * target-i386: add implementation of query-cpu-definitions (v2)Anthony Liguori2012-08-131-0/+22
| | | | | | | | | | Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
* | Merge remote-tracking branch 'qemu-kvm/uq/master' into stagingAnthony Liguori2012-08-134-0/+48
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | * qemu-kvm/uq/master: kvm: Add documentation comment for kvm_irqchip_in_kernel() kvm: Decouple 'GSI routing' from 'kernel irqchip' kvm: Decouple 'MSI routing via irqfds' from 'kernel irqchip' kvm: Decouple 'irqfds usable' from 'kernel irqchip' kvm: Move kvm_allows_irq0_override() to target-i386, fix return type kvm: Rename kvm_irqchip_set_irq() to kvm_set_irq() kvm: Decouple 'async interrupt delivery' from 'kernel irqchip' configure: Don't implicitly hardcode list of KVM architectures kvm: Check if smp_cpus exceeds max cpus supported by kvm
| * kvm: Decouple 'GSI routing' from 'kernel irqchip'Peter Maydell2012-08-091-1/+2
| | | | | | | | | | | | | | | | Don't assume having an in-kernel irqchip means that GSI routing is enabled. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Avi Kivity <avi@redhat.com>
| * kvm: Decouple 'MSI routing via irqfds' from 'kernel irqchip'Peter Maydell2012-08-091-1/+3
| | | | | | | | | | | | | | Decouple another x86-specific assumption about what irqchips imply. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Avi Kivity <avi@redhat.com>
| * kvm: Decouple 'irqfds usable' from 'kernel irqchip'Peter Maydell2012-08-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of assuming that we can use irqfds if and only if kvm_irqchip_in_kernel(), add a bool to the KVMState which indicates this, and is set only on x86 and only if the irqchip is in the kernel. The kernel documentation implies that the only thing you need to use KVM_IRQFD is that KVM_CAP_IRQFD is advertised, but this seems to be untrue. In particular the kernel does not (alas) return a sensible error if you try to set up an irqfd when you haven't created an irqchip. If it did we could remove all this nonsense and let the kernel return the error code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
| * kvm: Move kvm_allows_irq0_override() to target-i386, fix return typePeter Maydell2012-08-094-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | kvm_allows_irq0_override() is a totally x86 specific concept: move it to the target-specific source file where it belongs. This means we need a new header file for the prototype: kvm_i386.h, in line with the existing kvm_ppc.h. While we are moving it, fix the return type to be 'bool' rather than 'int'. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Avi Kivity <avi@redhat.com>
* | Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemuBlue Swirl2012-08-093-15/+12
|\ \ | |/ |/| | | | | | | | | | | * 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu: target-i386: move tcg initialization into x86_cpu_initfn() cleanup cpu_set_debug_excp_handler target-xtensa: drop usage of prev_debug_excp_handler target-i386: drop usage of prev_debug_excp_handler
| * target-i386: move tcg initialization into x86_cpu_initfn()Igor Mammedov2012-06-253-10/+12
| | | | | | | | | | | | | | | | | | In order to make cpu object not depended on external ad-hoc initialization routines, move tcg initialization from cpu_x86_init inside cpu object "x86_cpu_initfn()". Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de>
| * target-i386: drop usage of prev_debug_excp_handlerIgor Mammedov2012-06-251-6/+1
| | | | | | | | | | | | | | | | | | | | Chains of exception handlers are currently unused feature, drop it for now so as not to expose prev_debug_excp_handler at global scope when moving tcg initialization into target-i386/cpu.c Later we probably could re-invent better interface for this. Signed-off-by: Igor Mammedov <imammedo@redhat.com>
* | target-i386: move cpu_reset and reset callback to cpu.cIgor Mammedov2012-08-011-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moving reset callback into cpu object from board level and resetting cpu at the end of x86_cpu_realize() will allow properly create cpu object during run-time (hotplug) without calling reset externaly. When reset over QOM hierarchy is implemented, reset callback should be removed. v2: - leave cpu_reset in pc_new_cpu() for now, it's to be cleaned up when APIC init is moved in cpu.c Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* | target-i386: move cpu halted decision into x86_cpu_resetIgor Mammedov2012-08-013-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MP initialization protocol differs between cpu families, and for P6 and onward models it is up to CPU to decide if it will be BSP using this protocol, so try to model this. However there is no point in implementing MP initialization protocol in qemu. Thus first CPU is always marked as BSP. This patch: - moves decision to designate BSP from board into cpu, making cpu self-sufficient in this regard. Later it will allow to cleanup hw/pc.c and remove cpu_reset and wrappers from there. - stores flag that CPU is BSP in IA32_APIC_BASE to model behavior described in Inted SDM vol 3a part 1 chapter 8.4.1 - uses MSR_IA32_APICBASE_BSP flag in apic_base for checking if cpu is BSP patch is based on Jan Kiszka's proposal: http://thread.gmane.org/gmane.comp.emulators.qemu/100806 Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* | x86: Fixed incorrect segment base address addition in 64-bits modeVitaly Chipounov2012-07-291-18/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the Intel manual "Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3", "3.4.4 Segment Loading Instructions in IA-32e Mode": "When in compatibility mode, FS and GS overrides operate as defined by 32-bit mode behavior regardless of the value loaded into the upper 32 linear-address bits of the hidden descriptor register base field. Compatibility mode ignores the upper 32 bits when calculating an effective address." However, the code misses the 64-bit mode case, where an instruction with address and segment size override would be translated incorrectly. For example, inc dword ptr gs:260h[ebx*4] gets incorrectly translated to: (uint32_t)(gs.base + ebx * 4 + 0x260) instead of gs.base + (uint32_t)(ebx * 4 + 0x260) Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | Recognize PCID featureMao, Junjie2012-07-211-1/+1
| | | | | | | | | | | | | | This patch makes Qemu recognize the PCID feature specified from configuration or command line options. Signed-off-by: Junjie Mao <junjie.mao@intel.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* | Merge remote-tracking branch 'qemu-kvm/uq/master' into stagingAnthony Liguori2012-07-183-2/+14
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * qemu-kvm/uq/master: virtio: move common irqfd handling out of virtio-pci virtio: move common ioeventfd handling out of virtio-pci event_notifier: add event_notifier_set_handler memory: pass EventNotifier, not eventfd ivshmem: wrap ivshmem_del_eventfd loops with transaction ivshmem: use EventNotifier and memory API event_notifier: add event_notifier_init_fd event_notifier: remove event_notifier_test event_notifier: add event_notifier_set apic: Defer interrupt updates to VCPU thread apic: Reevaluate pending interrupts on LVT_LINT0 changes apic: Resolve potential endless loop around apic_update_irq kvm: expose tsc deadline timer feature to guest kvm_pv_eoi: add flag support kvm: Don't abort on kvm_irqchip_add_msi_route()
| * | apic: Defer interrupt updates to VCPU threadJan Kiszka2012-07-102-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | KVM performs TPR raising asynchronously to QEMU, specifically outside QEMU's global lock. When an interrupt is injected into the APIC and TPR is checked to decide if this can be delivered, a stale TPR value may be used, causing spurious interrupts in the end. Fix this by deferring apic_update_irq to the context of the target VCPU. We introduce a new interrupt flag for this, CPU_INTERRUPT_POLL. When it is set, the VCPU calls apic_poll_irq before checking for further pending interrupts. To avoid special-casing KVM, we also implement this logic for TCG mode. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
| * | kvm: expose tsc deadline timer feature to guestLiu, Jinsong2012-07-032-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch exposes tsc deadline timer feature to guest if 1). in-kernel irqchip is used, and 2). kvm has emulated tsc deadline timer, and 3). user authorize the feature exposing via -cpu or +/- tsc-deadline Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * | kvm_pv_eoi: add flag supportMichael S. Tsirkin2012-07-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support the new PV EOI flag in kvm - it recently got merged into kvm.git. Set by default with -cpu kvm. Set for -cpu qemu by adding +kvm_pv_eoi. Clear by adding -kvm_pv_eoi to -cpu option. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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