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* TCG variable type checking.pbrook2008-11-178-974/+1038
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
* target-i386: fix helper_pmovmskb_mmx helperaurel322008-11-161-16/+16
| | | | | | (malc) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5728 c046a42c-6fe2-441c-8c8c-71466251a162
* x86: fix warning without CONFIG_KVM (Mark McLoughlin)aliguori2008-11-131-2/+2
| | | | | | | | | | | | | | Warning is: target-i386/helper.c: In function `cpu_x86_cpuid': target-i386/helper.c:1373: warning: implicit declaration of function `host_cpuid' Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5718 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix CPUID ext2 features masking (Avi Kivity)aliguori2008-11-131-1/+1
| | | | | | | | | | | Typo. Exposes rdtscp which kills some guests. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5717 c046a42c-6fe2-441c-8c8c-71466251a162
* Define kvm_ioctl in the same way as ioctlaliguori2008-11-131-2/+2
| | | | | | | | | | | | | | The third argument to ioctl is a ... which allows any value to be passed. In practice, glibc always treats the argument as a void *. Do the same thing for the kvm ioctls to keep things consistent with a traditional ioctl. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5715 c046a42c-6fe2-441c-8c8c-71466251a162
* x86 CPUID extended family/model (Andre Przywara).balrog2008-11-101-2/+7
| | | | | | | | | | | | | | | x86 CPUs feature extended family/model bits in CPUID leaf 0000_0001|EAX. Refer to page 10 in: http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf Those bits are necessary to model newer AMD CPUs: -cpu qemu64,family=15,model=65,stepping=3 or -cpu qemu64,family=16,model=4,stepping=2 Signed-off-by: Andre Przywara <andre.przywara@amd.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5664 c046a42c-6fe2-441c-8c8c-71466251a162
* Add missing files to KVM commit.aliguori2008-11-051-0/+638
| | | | | | | | Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5629 c046a42c-6fe2-441c-8c8c-71466251a162
* Add KVM support to QEMUaliguori2008-11-052-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds very basic KVM support. KVM is a kernel module for Linux that allows userspace programs to make use of hardware virtualization support. It current supports x86 hardware virtualization using Intel VT-x or AMD-V. It also supports IA64 VT-i, PPC 440, and S390. This patch only implements the bare minimum support to get a guest booting. It has very little impact the rest of QEMU and attempts to integrate nicely with the rest of QEMU. Even though this implementation is basic, it is significantly faster than TCG. Booting and shutting down a Linux guest: w/TCG: 1:32.36 elapsed 84% CPU w/KVM: 0:31.14 elapsed 59% CPU Right now, KVM is disabled by default and must be explicitly enabled with -enable-kvm. We can enable it by default later when we have had better testing. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5627 c046a42c-6fe2-441c-8c8c-71466251a162
* Split CPUID from op_helperaliguori2008-11-053-162/+176
| | | | | | | | | | | | KVM needs to call CPUID from outside of the TCG code. This patch splits out the CPUID logic into a separate helper that both the op helper and KVM can call. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5626 c046a42c-6fe2-441c-8c8c-71466251a162
* Add additional CPU flag definitionsaliguori2008-11-051-1/+8
| | | | | | | | | | Some x86 CPU definitions that KVM needs Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5625 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix restore of older snapshots for target-i386 on big endian hostsaliguori2008-10-291-2/+2
| | | | | | | | | | | | A target_ulong may be 64-bit. Passing it to a function expecting a 32-bit pointer is wrong and unfortunately happens to work for x86. It won't work on big endian hosts though. Change the code to work properly on all hosts. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5570 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix cpuid ext_features value for Atom N270 (Blue Swirl).balrog2008-10-281-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5558 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix undeclared symbol warnings from sparseblueswir12008-10-261-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
* i386/SVM: return amount of ASIDsaurel322008-10-171-3/+3
| | | | | | | | | | | | | | With SVM the TLB supports tagging to distinguish TLB entries from different virtual CPUs. This tag is called an ASID. The amount of ASIDs is given in EBX of the SVM-CPUID-leaf. Currently we return 0, which might break hypervisors. Let's better return something >0 here, say 0x10. Since we're flushing the complete TLB on every VM entry and exit we're not making use of the ASID information anyways. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5496 c046a42c-6fe2-441c-8c8c-71466251a162
* target-i386: Add Core Duo Definitionaurel322008-10-142-2/+24
| | | | | | | | | | | | | | | | | | | | | | | This patch adds a CPU definition for the Core Duo CPU. I tried to resemble the original as closely as possible and document what features are missing still. This patch enables the use of a recent CPU definition on 32 bit platforms. It also fixes two issues that went along the line: - invalid xlevel in core2duo spec While looking though the CPUIDs again, I found that xlevel is actually 8. - non-PSE36 support The CoreDuo CPUID does not expose the PSE36 capability, but CPUID 0x80000008 is tied to 36 bits. This broke Windows XP installation for me, so I just set it to 32 bits width when PSE36 is not available. The original CPU also exposes 32 bit width in CPUID 0x80000008. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5488 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix crc32w decoding, fix a constant width in blendvpd.balrog2008-10-042-5/+4
| | | | | | | | Forced the constant's width to long long so that it doesn't overflow, problem spotted by C. W. Betts. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5417 c046a42c-6fe2-441c-8c8c-71466251a162
* x86 "popcnt" affects flags.balrog2008-10-041-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5412 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement SSE4.1, SSE4.2 (x86).balrog2008-10-043-33/+973
| | | | | | | | This adds support for CPUID_EXT_SSE41, CPUID_EXT_SSE42, CPUID_EXT_POPCNT extensions. Most instructions haven't been tested yet. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5411 c046a42c-6fe2-441c-8c8c-71466251a162
* Do not use load_seg_vm to load CS in real mode iret handlingmalc2008-10-021-1/+2
| | | | | | | | | | | | load_seg_vm calls cpu_x86_load_seg_cache which updates hflags of current env, real hardware doesn't do this, nor the code that handles real mode lret/lcall/ljmp. This unbreaks "unreal mode" and makes QEMU the first emulator being able to run Project Angel demo by IMPACT Studios. (Not that there are many physical machines out there capable of doing the same) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5403 c046a42c-6fe2-441c-8c8c-71466251a162
* Resurrect the safe part of r5274blueswir12008-10-021-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5401 c046a42c-6fe2-441c-8c8c-71466251a162
* x86 pextrw destination operand can be r64.balrog2008-10-011-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5367 c046a42c-6fe2-441c-8c8c-71466251a162
* Handle MSR_IA32_PERF_STATUS in rdmsr (Alexander Graf).balrog2008-09-301-6/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5366 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix save/restore regression introduced by r5318aliguori2008-09-291-1/+1
| | | | | | | | | | sysenter_cs is a u32 and is loaded as a u32. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5351 c046a42c-6fe2-441c-8c8c-71466251a162
* My core2duo patch introduced a vague statement of "missing features" in pbrook2008-09-293-9/+41
| | | | | | | | | | | | | | | | | | | | the CPUID specification. This patch addresses this by specifying exactly what is missing. While going along the missing CPUID entries I also stumbled across invalid and missing CPUID #defines while comparing them to the Intel Documentation. This patch also addresses these. I found them too minor to split them up in a separate patch. Furthermore I looked through CPUID functions > 5 and realized that it should be safe to bump the level to 10. I tried booting Linux with that and it worked fine. Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5350 c046a42c-6fe2-441c-8c8c-71466251a162
* Rename -cpu atom to -cpu n270.balrog2008-09-281-1/+1
| | | | | | | | As noticed by Alexander Graf Atom is a name of a series with varying features. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5341 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix definition of EMX bit in cpuid (Jens Axboe).balrog2008-09-261-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5330 c046a42c-6fe2-441c-8c8c-71466251a162
* Revert r5274 which breaks savevm/loadvmblueswir12008-09-251-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5321 c046a42c-6fe2-441c-8c8c-71466251a162
* Add Atom (x86) cpu identification.balrog2008-09-251-3/+24
| | | | | | | Also add SSSE3 to Core2 features. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5319 c046a42c-6fe2-441c-8c8c-71466251a162
* SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).balrog2008-09-255-29/+64
| | | | | | | | | | | On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patch makes both 64-bit aware and enables them for Intel CPUs. Add cpu save/load for 64-bit wide sysenter variables. Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5318 c046a42c-6fe2-441c-8c8c-71466251a162
* Core 2 Duo specification (Alexander Graf).balrog2008-09-253-0/+66
| | | | | | | | | | | | | | | This patch adds a Core 2 Duo CPU to the available CPU types. The CPU definition tries to resemble a real CPU as good as possible, whilst not exposing features qemu does not implement. The patch also includes some minor additions that Core 2 Duo CPUs have: - New MSR: MSR_IA32_PERF_STATUS - CPUID up to level 5 (cache info and mwait) Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5317 c046a42c-6fe2-441c-8c8c-71466251a162
* Clean up vendor identification (Alexander Graf).balrog2008-09-252-6/+14
| | | | | | | | | | | Right now CPU vendor identification contains a lot of magic numbers. The patch cleans them up to defines, so we can identify the CPU later on without copying magic numbers. Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5316 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement x86 SSSE3 instructions.balrog2008-09-253-4/+272
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5315 c046a42c-6fe2-441c-8c8c-71466251a162
* Use qemu_free() on env instead of free.balrog2008-09-251-1/+1
| | | | | | | Fixes a glibc Abort on qemu-x86_64 -cpu foo. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5314 c046a42c-6fe2-441c-8c8c-71466251a162
* Add signed versions of save/load functionsblueswir12008-09-201-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5274 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix up pxe boot (Glauber Costa)aliguori2008-09-091-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | As discussed in http://lists.gnu.org/archive/html/qemu-devel/2008-08/msg00667.html, current pxe boot is broken for some use cases. The problem goes away if we reduce the number of allowed bits in the address space to 32 (which has the side effect of reducing guest max mem size to 4Gb). After digging for a while, it turns out that it happens because pxelinux tries to access address 0x10009e9a6, which does not fit a 32-bit address. A closer look, however, reveals this access is totally valid: It's just 0x9e9a6 with an add carry. To avoid this, this patch casts the address passed to the POPL macro to a 32-bit value. This is also done, although just theorectically, for PUSHL too. Signed-off-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Reported-by: Chris Lalancette <clalance@redhat.com> CC: Eduardo Habkost <ehabkost@redhat.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5182 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix most warnings that would be caused by gcc flag -Wundefblueswir12008-09-061-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5173 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix some warnings that would be generated by gcc -Wredundant-declsblueswir12008-08-302-26/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
* i386: Catch all non-present ptes in cpu_get_phys_page_debug (Jan Kiszka)aliguori2008-08-181-0/+2
| | | | | | | | | | | | It helps debugging guests when yet unmapped pages are correctly reported as, well, unmapped. Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5025 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix task register type after reset (Avi Kivity)aliguori2008-07-231-1/+1
| | | | | | | | | | | Obvious typo that breaks reboots. Signed-off-by: Avi Kivity <avi@qumranet.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4926 c046a42c-6fe2-441c-8c8c-71466251a162
* Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths2008-07-181-8/+7
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
* fix cvtsq2s[sd] (Juergen Lock)bellard2008-07-071-2/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4856 c046a42c-6fe2-441c-8c8c-71466251a162
* Re-add static qualifier. Fix annother occurance of "const static".pbrook2008-07-051-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4850 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix constant truncation, spotted by Jindrich Makovicka.ths2008-07-031-3/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4832 c046a42c-6fe2-441c-8c8c-71466251a162
* Move interrupt_request and user_mode_only to common cpu state.pbrook2008-07-012-6/+5
| | | | | | | | Save and restore env->interrupt_request and env->halted. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix rdtsc instruction counting.pbrook2008-06-301-0/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4810 c046a42c-6fe2-441c-8c8c-71466251a162
* Move CPU save/load registration to common code.pbrook2008-06-301-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
* Add instruction counter.pbrook2008-06-292-4/+63
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
* added model_id and vendor cpu model options (initial patch by Dan ↵bellard2008-06-201-11/+29
| | | | | | Kenigsberg) - various cleanup git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4757 c046a42c-6fe2-441c-8c8c-71466251a162
* cmpxchg fixesbellard2008-06-201-0/+7
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4755 c046a42c-6fe2-441c-8c8c-71466251a162
* HLT, MWAIT and MONITOR insn fixes (initial patch by Alexander Graf)bellard2008-06-183-11/+21
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4746 c046a42c-6fe2-441c-8c8c-71466251a162
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