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* cpu-exec: Make debug_excp_handler a QOM CPU methodPeter Maydell2014-09-123-6/+7
* target-i386: Reject invalid CPU feature names on the command-lineEduardo Habkost2014-09-051-4/+5
* target-i386: Support migratable=no properlyEduardo Habkost2014-09-052-8/+16
* Merge remote-tracking branch 'remotes/kvm/tags/for-upstream' into stagingPeter Maydell2014-08-285-8/+117
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| * target-i386: Add "tsc_adjust" CPU feature nameEduardo Habkost2014-08-261-1/+1
| * target-i386: Add "mpx" CPU feature nameEduardo Habkost2014-08-261-1/+1
| * x86: Clear MTRRs on vCPU resetAlex Williamson2014-08-251-0/+10
| * x86: kvm: Add MTRR support for kvm_get|put_msrs()Alex Williamson2014-08-252-2/+101
| * x86: Use common variable range MTRR countsAlex Williamson2014-08-252-2/+2
| * target-i386: Don't forbid NX bit on PAE PDEs and PTEsWilliam Grant2014-08-251-2/+2
* | linux-user: Fix syscall instruction usermode emulation on X86_64Jincheng Miao2014-08-221-2/+2
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* Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' int...Peter Maydell2014-08-151-0/+3
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| * trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
* | target-i386/cpu.c: Fix two error output indentationchenfan2014-08-091-5/+5
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* target-i386: Allow execute from user mode when SMEP is enabled.Ricky Zhou2014-07-151-1/+2
* target-i386: Add "kvmclock-stable-bit" feature bit nameEduardo Habkost2014-07-101-1/+1
* target-i386: Broadwell CPU modelEduardo Habkost2014-06-251-0/+34
* target-i386: Fix indentation of CPU model definitionsEduardo Habkost2014-06-251-102/+102
* target-i386: Support "invariant tsc" flagMarcelo Tosatti2014-06-252-0/+29
* target-i386: block migration and savevm if invariant tsc is exposedMarcelo Tosatti2014-06-253-2/+17
* target-i386: Set migratable=yes by default on "host" CPU mooelEduardo Habkost2014-06-251-1/+1
* target-i386: Add "migratable" property to "host" CPU modelEduardo Habkost2014-06-252-9/+55
* target-i386: Support check/enforce flags in TCG mode, tooEduardo Habkost2014-06-251-18/+18
* target-i386: Loop-based feature word filtering in TCG modeEduardo Habkost2014-06-251-8/+13
* target-i386: Loop-based copying and setting/unsetting of feature wordsEduardo Habkost2014-06-251-25/+10
* target-i386: Define TCG_*_FEATURES earlier in cpu.cEduardo Habkost2014-06-251-55/+56
* target-i386: Filter KVM and 0xC0000001 features on TCGEduardo Habkost2014-06-251-0/+4
* target-i386: Filter FEAT_7_0_EBX TCG features tooEduardo Habkost2014-06-251-1/+2
* target-i386: Make TCG feature filtering more readableEduardo Habkost2014-06-251-6/+10
* target-i386: Isolate KVM-specific code on CPU feature filtering logicEduardo Habkost2014-06-251-9/+13
* target-i386: Pass FeatureWord argument to report_unavailable_features()Eduardo Habkost2014-06-251-2/+3
* target-i386: Merge feature filtering/checking functionsEduardo Habkost2014-06-251-34/+20
* target-i386: Simplify reporting of unavailable featuresEduardo Habkost2014-06-251-10/+7
* target-i386: kvm: Don't enable MONITOR by default on any CPU modelEduardo Habkost2014-06-251-0/+7
* target-i386: Use Common ShiftRows and InvShiftRows TablesTom Musta2014-06-161-19/+13
* savevm: Remove all the unneeded version_minimum_id_old (x86)Juan Quintela2014-06-161-38/+19
* cpu/x86: correctly set errors in x86_cpu_parse_featurestrPaolo Bonzini2014-06-101-10/+7
* target-i386/translate.c: Remove unused tcg_gen_lshift()Peter Maydell2014-06-101-8/+0
* Merge remote-tracking branch 'remotes/bonzini/softmmu-smap' into stagingPeter Maydell2014-06-059-340/+242
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| * target-i386: cleanup x86_cpu_get_phys_page_debugPaolo Bonzini2014-06-051-18/+17
| * target-i386: fix protection bits in the TLB for SMEPPaolo Bonzini2014-06-051-1/+3
| * target-i386: support long addresses for 4MB pages (PSE-36)Paolo Bonzini2014-06-052-5/+10
| * target-i386: raise page fault for reserved bits in large pagesPaolo Bonzini2014-06-052-0/+3
| * target-i386: unify reserved bits and NX bit checkPaolo Bonzini2014-06-051-12/+4
| * target-i386: simplify pte/vaddr calculationPaolo Bonzini2014-06-051-8/+7
| * target-i386: raise page fault for reserved physical address bitsPaolo Bonzini2014-06-052-12/+32
| * target-i386: test reserved PS bit on PML4EsPaolo Bonzini2014-06-051-0/+3
| * target-i386: set correct error code for reserved bit accessPaolo Bonzini2014-06-051-17/+9
| * target-i386: introduce support for 1 GB pagesPaolo Bonzini2014-06-052-3/+8
| * target-i386: introduce do_check_protect labelPaolo Bonzini2014-06-051-36/+38
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