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* target-i386: Split out CPU creation and features parsingIgor Mammedov2013-04-162-3/+16
* target-i386/cpu.c: Coding style fixesEduardo Habkost2013-04-161-3/+4
* target-i386: Split APIC creation from initialization in x86_cpu_realizefn()Igor Mammedov2013-04-161-3/+21
* target-i386: Consolidate error propagation in x86_cpu_realizefn()Igor Mammedov2013-04-161-7/+10
* target-i386: Improve -cpu ? features outputJan Kiszka2013-04-161-8/+6
* target-i386: Fix including "host" in -cpu ? outputJan Kiszka2013-04-161-3/+6
* target-i386: add AES-NI instructionsAurelien Jarno2013-04-135-3/+104
* target-i386: enable PCLMULQDQ on Westmere CPUAurelien Jarno2013-04-131-1/+1
* target-i386: add pclmulqdq instructionAurelien Jarno2013-04-134-10/+41
* hw: move headers to include/Paolo Bonzini2013-04-084-7/+7
* extract/unify the constant 0xfee00000 as APIC_DEFAULT_ADDRESSLaszlo Ersek2013-04-042-3/+3
* strip some whitespaceLaszlo Ersek2013-04-041-1/+1
* target-i386: Check for host features before filter_features_for_kvm()Eduardo Habkost2013-04-031-3/+3
* target-i386: SSE4.2: use clz32/ctz32 instead of reinventing the wheelAurelien Jarno2013-04-012-30/+3
* target-i386: enable SSE4.1 and SSE4.2 in TCG modeAurelien Jarno2013-04-011-6/+7
* target-i386: SSE4.2: fix pcmpXstrX instructions with "Masked(-)" polarityAurelien Jarno2013-04-011-1/+1
* target-i386: SSE4.2: fix pcmpXstrX instructions in "Equal ordered" modeAurelien Jarno2013-04-011-2/+3
* target-i386: SSE4.2: fix pcmpXstrX instructions in "Equal each" modeAurelien Jarno2013-04-011-1/+1
* target-i386: SSE4.2: fix pcmpXstrX instructions in "Ranges" modeAurelien Jarno2013-04-011-2/+2
* target-i386: SSE4.2: fix pcmpXstrm instructionsAurelien Jarno2013-04-011-8/+8
* target-i386: SSE4.2: fix pcmpXstri instructionsAurelien Jarno2013-04-011-2/+2
* target-i386: SSE4.2: fix pcmpgtq instructionAurelien Jarno2013-04-011-2/+1
* target-i386: SSE4.1: fix pinsrb instructionAurelien Jarno2013-04-011-2/+2
* target-i386: Don't modify env->eflags around cpu_dump_stateRichard Henderson2013-03-231-1/+1
* target-i386: Fix flags computation for ADOXRichard Henderson2013-03-231-1/+1
* Fix typos and misspellingsPeter Maydell2013-03-221-1/+1
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-124-3/+12
* cpu: Pass CPUState to cpu_interrupt()Andreas Färber2013-03-121-3/+3
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-127-50/+66
* target-i386: Update VMStateDescription to X86CPUAndreas Färber2013-03-124-110/+113
* Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori2013-03-041-1/+2
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| * Fix guest OS hang when 64bit PCI bar presentAlexey Korolev2013-02-271-1/+2
* | gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell2013-03-031-2/+2
* | cpu: Introduce ENV_OFFSET macrosAndreas Färber2013-03-031-0/+1
* | target-i386: Use mulu2 and muls2Richard Henderson2013-02-273-155/+56
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* target-i386: Use add2 to implement the ADX extensionRichard Henderson2013-02-231-11/+9
* target-i386: Use movcond to implement shiftd.Richard Henderson2013-02-191-141/+106
* target-i386: Discard CC_OP computation in set_cc_op alsoRichard Henderson2013-02-191-3/+11
* target-i386: Use movcond to implement rotate flags.Richard Henderson2013-02-191-116/+121
* target-i386: Use movcond to implement shift flags.Richard Henderson2013-02-191-52/+42
* target-i386: Add CC_OP_CLRRichard Henderson2013-02-194-3/+21
* target-i386: Implement tzcnt and fix lzcntRichard Henderson2013-02-193-48/+54
* target-i386: Use clz/ctz for bsf/bsr helpersRichard Henderson2013-02-192-37/+14
* target-i386: Implement ADX extensionRichard Henderson2013-02-195-5/+146
* target-i386: Implement RORXRichard Henderson2013-02-181-0/+32
* target-i386: Implement SHLX, SARX, SHRXRichard Henderson2013-02-181-0/+31
* target-i386: Implement PDEP, PEXTRichard Henderson2013-02-183-0/+71
* target-i386: Implement MULXRichard Henderson2013-02-183-0/+47
* target-i386: Implement BZHIRichard Henderson2013-02-181-0/+27
* target-i386: Implement BLSR, BLSMSK, BLSIRichard Henderson2013-02-185-1/+95
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