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* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into ↵Peter Maydell2015-03-025-240/+56
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging * remotes/ehabkost/tags/x86-pull-request: target-i386: Move APIC ID compatibility code to pc.c target-i386: Require APIC ID to be explicitly set before CPU realize target-i386: Set APIC ID using cpu_index on CONFIG_USER linux-user: Check for cpu_init() errors target-i386: Move CPUX86State.cpuid_apic_id to X86CPU.apic_id target-i386: Simplify error handling on cpu_x86_init_user() target-i386: Eliminate cpu_init() function target-i386: Rename cpu_x86_init() to cpu_x86_init_user() target-i386: Move topology.h to include/hw/i386 target-i386: Eliminate unnecessary get_cpuid_vendor() function target-i386: Simplify listflags() function Conflicts: target-i386/cpu.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-i386: Move APIC ID compatibility code to pc.cEduardo Habkost2015-02-251-34/+0
| | | | | | | | | | | | | | | | | | The APIC ID compatibility code is required only for PC, and now that x86_cpu_initfn() doesn't use x86_cpu_apic_id_from_index() anymore, that code can be moved to pc.c. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * target-i386: Require APIC ID to be explicitly set before CPU realizeEduardo Habkost2015-02-252-2/+7
| | | | | | | | | | | | | | | | | | Instead of setting APIC ID automatically when creating a X86CPU, require the property to be set before realizing the object (which all callers of cpu_x86_create() already do). Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * target-i386: Set APIC ID using cpu_index on CONFIG_USEREduardo Habkost2015-02-251-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The PC CPU initialization code already sets apic-id based on the CPU topology, and CONFIG_USER doesn't need the topology-based APIC ID calculation code. Make CONFIG_USER set apic-id before realizing the CPU (just like PC already does), so we can simplify x86_cpu_initfn later. As there is no CPU topology configuration in CONFIG_USER, just use cpu_index as the APIC ID. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * target-i386: Move CPUX86State.cpuid_apic_id to X86CPU.apic_idEduardo Habkost2015-02-254-11/+10
| | | | | | | | | | | | | | | | The field doesn't need to be inside CPUState, and it is not specific for the CPUID instruction, so move and rename it. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * target-i386: Simplify error handling on cpu_x86_init_user()Eduardo Habkost2015-02-251-9/+11
| | | | | | | | | | | | | | Isolate error handling path from the "if (error)" checks. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * target-i386: Eliminate cpu_init() functionEduardo Habkost2015-02-252-12/+6
| | | | | | | | | | | | | | | | Instead of putting extra logic inside cpu.h, just do everything inside cpu_x86_init_user(). Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * target-i386: Rename cpu_x86_init() to cpu_x86_init_user()Eduardo Habkost2015-02-252-3/+3
| | | | | | | | | | | | | | The function is used only for CONFIG_USER, so make its purpose clear. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * target-i386: Move topology.h to include/hw/i386Eduardo Habkost2015-02-252-135/+1
| | | | | | | | | | | | | | | | This will allow the PC code to use the header, and lets us eliminate the QEMU_INCLUDES hack inside tests/Makefile. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * target-i386: Eliminate unnecessary get_cpuid_vendor() functionEduardo Habkost2015-02-251-14/+6
| | | | | | | | | | | | | | | | | | The function was used in only two places. In one of them, the function made the code less readable by requiring temporary te[bcd]x variables. In the other one we can simply inline the existing code. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * target-i386: Simplify listflags() functionEduardo Habkost2015-02-251-28/+14
| | | | | | | | | | | | | | | | | | | | | | listflags() had lots of unnecessary complexity. Instead of printing to a buffer that will be immediately printed, simply call the printing function directly. Also, remove the fbits and flags arguments that were always set to the same value. Also, there's no need to list the flags in reverse order. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | error: Use error_report_err() where appropriateMarkus Armbruster2015-02-181-2/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | Coccinelle semantic patch: @@ expression E; @@ - error_report("%s", error_get_pretty(E)); - error_free(E); + error_report_err(E); @@ expression E, S; @@ - error_report("%s", error_get_pretty(E)); + error_report_err(E); ( exit(S); | abort(); ) Trivial manual touch-ups in block/sheepdog.c. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-6/+3
| | | | | | | | The method by which we count the number of ops emitted is going to change. Abstract that away into some inlines. Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+1
| | | | | Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Disable HLE and RTM on Haswell & BroadwellEduardo Habkost2015-01-261-5/+4
| | | | | | | | | | | | | | All Haswell CPUs and some Broadwell CPUs were updated by Intel to have the HLE and RTM features disabled. This will prevent "-cpu Haswell,enforce" and "-cpu Broadwell,enforce" from running out of the box on those CPUs. Disable those features by default on Broadwell and Haswell CPU models, starting on pc-*-2.3. Users who want to use those features can enable them explicitly on the command-line. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-i386: make xmm_regs 512-bit widePaolo Bonzini2015-01-263-104/+59
| | | | | | | | | | | | | | | | | | | Right now, the AVX512 registers are split in many different fields: xmm_regs for the low 128 bits of the first 16 registers, ymmh_regs for the next 128 bits of the same first 16 registers, zmmh_regs for the next 256 bits of the same first 16 registers, and finally hi16_zmm_regs for the full 512 bits of the second 16 bit registers. This makes it simple to move data in and out of the xsave region, but would be a nightmare for a hypothetical TCG implementation and leads to a proliferation of [XYZ]MM_[BWLSQD] macros. Instead, this patch marshals data manually from the xsave region to a single 32x512-bit array, simplifying the macro jungle and clarifying which bits are in which vmstate subsection. The migration format is unaffected. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-i386: use vmstate_offset_sub_array for AVX registersPaolo Bonzini2015-01-261-12/+16
| | | | | | | | | | | | After the next patch, each vmstate field will extract parts of a larger (32x512-bit) array, so we cannot check the vmstate field against the type of the array. While changing this, change the macros to accept the index of the first element (which will not be 0 for Hi16_ZMM_REGS) instead of the number of elements (which is always CPU_NB_REGS). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* cpu_ldst.h: Use inline functions for usermode cpu_ld/st accessorsPeter Maydell2015-01-201-1/+15
| | | | | | | | | | | | | | | | | | | Use inline functions rather than macros for cpu_ld/st accessors for the *-user configurations, as we already do for softmmu. This has a two advantages: * we can actually typecheck our arguments * we don't need to leak the _raw macros everywhere Since the _kernel functions were only used by target-i386/seg_helper.c, put the definitions for them in that file too. (It already has the similar template include code to define them for the softmmu case, so it makes sense to have it deal with defining them for user-only.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-12-git-send-email-peter.maydell@linaro.org
* exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell2015-01-201-2/+0
| | | | | | | | | | | | | | The TARGET_HAS_ICE #define is intended to indicate whether a target-* guest CPU implementation supports the breakpoint handling. However, all our guest CPUs have that support (the only two which do not define TARGET_HAS_ICE are unicore32 and openrisc, and in both those cases the bp support is present and the lack of the #define is just a bug). So remove the #define entirely: all new guest CPU support should include breakpoint handling as part of the basic implementation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1420484960-32365-1-git-send-email-peter.maydell@linaro.org
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2015-01-142-11/+30
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mostly bugfixes and cleanups from qemu-devel. Yet another small patch from the record/replay series, and a few SCSI and i386 patches as well. # gpg: Signature made Wed 14 Jan 2015 09:39:14 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: cpus: consistently use QEMU_CLOCK_VIRTUAL_RT for icount_warp_rt timer qemu-timer: rename timer_init to timer_init_tl scsi: fix cancellation when I/O was completed but DMA was not. rules.mak: Fix module build hw/scsi/lsi53c895a: add support for additional diag / debug registers qemu-common.h: optimise muldiv64 if int128 is available target-i386: do not memcpy in and out of xmm_regs target-i386: fix movntsd on big-endian hosts vl.c: fix regression when reading memory size from config file vl: Don't silently change topology when all -smp options were set vl: fix max_cpus check vl: Avoid unnecessary 'if' nesting 9pfs: changed to use event_notifier instead of qemu_pipe vl.c: fix regression when reading machine type from config file char: restore stdio echo on resume from suspend. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-i386: do not memcpy in and out of xmm_regsPaolo Bonzini2015-01-142-10/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | After the next patch, we will move the high parts of AVX and AVX512 registers in the same array as the SSE registers. This will make it impossible to memcpy an array of 128-bit values in and out of xmm_regs in one swoop. Use a for loop instead. Similarly, always use XMM_Q in translate.c. This avoids introducing bugs such as the one fixed in the previous patch. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * target-i386: fix movntsd on big-endian hostsPaolo Bonzini2015-01-141-1/+2
| | | | | | | | | | | | | | | | This was accessing an XMM register's low half without going through XMM_Q. Cc: qemu-stable@nongnu.org Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | kvm: extend kvm_irqchip_add_msi_route to work on s390Frank Blaschka2015-01-121-0/+6
|/ | | | | | | | | | | on s390 MSI-X irqs are presented as thin or adapter interrupts for this we have to reorganize the routing entry to contain valid information for the adapter interrupt code on s390. To minimize impact on existing code we introduce an architecture function to fixup the routing entry. Signed-off-by: Frank Blaschka <frank.blaschka@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
| | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* translate: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-20/+30
| | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qemu-log: add log category for MMU infoAntony Pavlov2014-12-161-11/+4
| | | | | | | | | | | | | | | | | | | | | | | Running barebox on qemu-system-mips* with '-d unimp' overloads stderr by very very many mips_cpu_handle_mmu_fault() messages: mips_cpu_handle_mmu_fault address=b80003fd ret 0 physical 00000000180003fd prot 3 mips_cpu_handle_mmu_fault address=a0800884 ret 0 physical 0000000000800884 prot 3 mips_cpu_handle_mmu_fault pc a080cd80 ad b80003fd rw 0 mmu_idx 0 So it's very difficult to find LOG_UNIMP message. The mips_cpu_handle_mmu_fault() messages appear on enabling ANY logging! It's not very handy. Adding separate log category for *_cpu_handle_mmu_fault() logging fixes the problem. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Acked-by: Alexander Graf <agraf@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1418489298-1184-1-git-send-email-antonynpavlov@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2014-12-157-48/+170
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Migration and linuxboot fixes for 2.2 regressions - valgrind/KVM support - small i386 patches - PCI SD host controller support - malloc/free cleanups from Markus (x86/scsi) - IvyBridge model - XSAVES support for KVM - initial patches from record/replay # gpg: Signature made Mon 15 Dec 2014 16:35:08 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (47 commits) sdhci: Support SDHCI devices on PCI sdhci: Define SDHCI PCI ids sdhci: Add "sysbus" to sdhci QOM types and methods sdhci: Remove class "virtual" methods sdhci: Set a default frequency clock serial: only resample THR interrupt on rising edge of IER.THRI serial: update LSR on enabling/disabling FIFOs serial: clean up THRE/TEMT handling serial: reset thri_pending on IER writes with THRI=0 linuxboot: fix loading old kernels kvm/apic: fix 2.2->2.1 migration target-i386: add Ivy Bridge CPU model target-i386: add f16c and rdrand to Haswell and Broadwell target-i386: add VME to all CPUs pc: add 2.3 machine types i386: do not cross the pages boundaries in replay mode cpus: make icount warp behave well with respect to stop/cont timer: introduce new QEMU_CLOCK_VIRTUAL_RT clock cpu-exec: invalidate nocache translation if they are interrupted icount: introduce cpu_get_icount_raw ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-i386: add Ivy Bridge CPU modelPaolo Bonzini2014-12-151-0/+32
| | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * target-i386: add f16c and rdrand to Haswell and BroadwellPaolo Bonzini2014-12-151-2/+2
| | | | | | | | | | | | | | | | Both were added in Ivy Bridge (for which we do not have a CPU model yet!). Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * target-i386: add VME to all CPUsPaolo Bonzini2014-12-151-15/+15
| | | | | | | | | | | | | | | | | | vm86 mode extensions date back to the 486. All models should have them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * i386: do not cross the pages boundaries in replay modePavel Dovgalyuk2014-12-152-0/+17
| | | | | | | | | | | | | | | | | | | | | | This patch denies crossing the boundary of the pages in the replay mode, because it can cause an exception. Do it only when boundary is crossed by the first instruction in the block. If current instruction already crossed the bound - it's ok, because an exception hasn't stopped this code. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * x86: Drop some superfluous casts from void *Markus Armbruster2014-12-152-2/+2
| | | | | | | | | | | | Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * x86: Use g_new() & friends where that makes obvious senseMarkus Armbruster2014-12-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form sizeof(T). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * x86: Fuse g_malloc(); memset() into g_malloc0()Markus Armbruster2014-12-151-12/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Coccinelle semantic patch: @@ expression LHS, SZ; @@ - LHS = g_malloc(SZ); - memset(LHS, 0, SZ); + LHS = g_malloc0(SZ); Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * target-i386: get/set/migrate XSAVES stateWanpeng Li2014-12-154-1/+38
| | | | | | | | | | | | | | | | Add xsaves related definition, it also adds corresponding part to kvm_get/put, and vmstate. Signed-off-by: Wanpeng Li <wanpeng.li@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * target-i386: add feature flags for CPUID[EAX=0xd,ECX=1]Paolo Bonzini2014-12-152-1/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | These represent xsave-related capabilities of the processor, and KVM may or may not support them. Add feature bits so that they are considered by "-cpu ...,enforce", and use the new feature work instead of calling kvm_arch_get_supported_cpuid. Bit 3 (XSAVES) is not migratables because it requires saving MSR_IA32_XSS. Neither KVM nor any commonly available hardware supports it anyway. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * valgrind/i386: avoid false positives on KVM_SET_VCPU_EVENTS ioctlChristian Borntraeger2014-12-151-1/+1
| | | | | | | | | | | | | | | | struct kvm_vcpu_events contains reserved fields. Let's use a designated initializer to avoid false positives in valgrind. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * valgrind/i386: avoid false positives on KVM_GET_MSRS ioctlChristian Borntraeger2014-12-151-1/+4
| | | | | | | | | | | | | | | | | | struct kvm_msrs contains a pad field. Let's use a designated initializer on the info part to avoid false positives from valgrind/memcheck. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * valgrind/i386: avoid false positives on KVM_SET_MSRS ioctlChristian Borntraeger2014-12-151-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct kvm_msrs contains padding bytes. Let's use a designated initializer on the info part to avoid false positives from valgrind/memcheck. Do the same for generic MSRS, the TSC and feature control. We also need to zero out the reserved fields in the entries. We do this in kvm_msr_entry_set as suggested by Paolo. This avoids a big memset that a designated initializer on the full structure would do. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * valgrind/i386: avoid false positives on KVM_SET_XCRS ioctlChristian Borntraeger2014-12-151-1/+1
| | | | | | | | | | | | | | | | struct kvm_xcrs contains padding bytes. Let's use a designated initializer to avoid false positives from valgrind/memcheck. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * KVM_CAP_IRQFD and KVM_CAP_IRQFD_RESAMPLE checksEric Auger2014-12-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compute kvm_irqfds_allowed by checking the KVM_CAP_IRQFD extension. Remove direct settings in architecture specific files. Add a new kvm_resamplefds_allowed variable, initialized by checking the KVM_CAP_IRQFD_RESAMPLE extension. Add a corresponding kvm_resamplefds_enabled() function. A special notice for s390 where KVM_CAP_IRQFD was not immediatly advirtised when irqfd capability was introduced in the kernel. KVM_CAP_IRQ_ROUTING was advertised instead. This was fixed in "KVM: s390: announce irqfd capability", ebc3226202d5956a5963185222982d435378b899 whereas irqfd support was brought in 84223598778ba08041f4297fda485df83414d57e, "KVM: s390: irq routing for adapter interrupts". Both commits first appear in 3.15 so there should not be any kernel version impacted by this QEMU modification. Signed-off-by: Eric Auger <eric.auger@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * target-i386: simplify AES emulationAurelien Jarno2014-12-151-8/+8
| | | | | | | | | | | | | | | | | | | | This patch simplifies the AES code, by directly accessing the newly added S-Box, InvS-Box and InvMixColumns tables instead of recreating them by using the AES_Te and AES_Td tables. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | target-i386: fix icount processing for repz instructionsPavel Dovgalyuk2014-12-141-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TCG generates optimized code for i386 repz instructions in single step mode. It means that when ecx becomes 0, execution of the string instruction breaks immediately without an additional iteration for ecx==0 (which will only check ecx and set the flags). Omitting this iteration leads to different instructions counting in singlestep mode and in normal execution. This patch disables optimization of this last iteration for icount mode which should be deterministic. v2: inverted the condition and formatted the comment Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target-i386: fbld instruction doesn't set minus signDmitry Poletaev2014-12-141-1/+1
| | | | | | | | | | Signed-off-by: Dmitry Poletaev <poletaev-qemu@yandex.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | target-i386: Wrong conversion infinity from float80 to int32/int64Dmitry Poletaev2014-12-141-1/+19
|/ | | | | Signed-off-by: Dmitry Poletaev <poletaev-qemu@yandex.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
* apic: avoid getting out of halted state on masked PIC interruptsPaolo Bonzini2014-11-241-2/+8
| | | | | | | | | | | | | | | | | | | | After the next patch, if a masked PIC interrupts causes CPU_INTERRUPT_POLL to be set, the CPU will spuriously get out of halted state. While this is technically valid, we should avoid that. Make CPU_INTERRUPT_POLL run apic_update_irq in the right thread and then look at CPU_INTERRUPT_HARD. If CPU_INTERRUPT_HARD does not get set, do not report the CPU as having work. Also move the handling of software-disabled APIC from apic_update_irq to apic_irq_pending, and always trigger CPU_INTERRUPT_POLL. This will be important once we will add a case that resets CPU_INTERRUPT_HARD from apic_update_irq. We want to run it even if we go through CPU_INTERRUPT_POLL, and even if the local APIC is software disabled. Reported-by: Richard Bilson <rbilson@qnx.com> Tested-by: Richard Bilson <rbilson@qnx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2014-11-132-14/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | x86 and SCSI fixes. I left out the APIC device model patches, pending confirmation from the submitter that they really fix QNX. # gpg: Signature made Thu 13 Nov 2014 15:13:38 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: acpi: accurate overflow check smbios: change 'ram_addr_t' variables to 'uint64_t' kvmclock: Add comment explaining why we need cpu_clean_all_dirty() target-i386: fix Coverity complaints about overflows apic_common: migrate missing fields target-i386: eliminate dead code and hoist common code out of "if" virtio-scsi: Fix comment for VirtIOSCSIReq virtio-scsi: dataplane: suppress guest notification esp: Do not overwrite ESP_TCHI after reset virtio-scsi: dataplane: fix allocation for 'cmd_vrings' esp: fix coding standards virtio-scsi: work around bug in old BIOSes esp-pci: fixup deadlock with linux Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-i386: fix Coverity complaints about overflowsPaolo Bonzini2014-11-131-1/+1
| | | | | | | | | | | | | | | | | | sipi_vector is an int; it is shifted by 12 and passed as a 64-bit value, which makes Coverity think that we wanted (uint64_t)sipi_vector << 12. But actually it must be between 0 and 255. Make this explicit. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * target-i386: eliminate dead code and hoist common code out of "if"Paolo Bonzini2014-11-121-13/+4
| | | | | | | | | | | | | | | | | | | | ist != 0 is checked in the first "if", so it cannot be true in the "else if" part. While at it, simplify the code and move the ESP alignment out of the conditionals. Reported by Coverity. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | Merge remote-tracking branch ↵Peter Maydell2014-11-111-3/+3
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/mjt/tags/pull-trivial-patches-2014-11-11' into staging trivial patches for 2014-11-11 # gpg: Signature made Tue 11 Nov 2014 14:38:39 GMT using RSA key ID A4C3D7DB # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" # gpg: aka "Michael Tokarev <mjt@corpit.ru>" # gpg: aka "Michael Tokarev <mjt@debian.org>" * remotes/mjt/tags/pull-trivial-patches-2014-11-11: block: Fix comment for bdrv_co_get_block_status sysbus: Correct SYSTEM_BUS(obj) defines target-i386: cpu: keeping function parameters alignment on new line xen-hvm: Remove redundant variable 'xstate' coroutine-sigaltstack: Change jmp_buf to sigjmp_buf pc-bios: petalogix-s3adsp1800.dtb: Use 'xlnx, xps-ethernetlite-2.00.a' instead of 'xlnx, xps-ethernetlite-2.00.b' gdbstub: Add a missing case of signal number translation in gdbstub numa: make 'info numa' take into account hotplugged memory slirp/smbd: modify/set several parameters in generated smbd.conf qemu-doc.texi: fix typos in x509 examples icc_bus: fix typo ICC_BRIGDE -> ICC_BRIDGE Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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