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* tcg: Add type for vCPU pointersLluís Vilanova2019-11-291-1/+1
* target-i386: Implement FSGSBASERichard Henderson2019-11-291-0/+34
* target-i386: Clear bndregs during legacy near jumpsRichard Henderson2019-11-291-0/+20
* target-i386: Implement BNDLDX, BNDSTXRichard Henderson2019-11-291-0/+57
* target-i386: Implement BNDCL, BNDCU, BNDCNRichard Henderson2019-11-291-1/+43
* target-i386: Implement BNDMOVRichard Henderson2019-11-291-1/+72
* target-i386: Implement BNDMKRichard Henderson2019-11-291-1/+57
* target-i386: Split up gen_lea_modrmRichard Henderson2019-11-291-114/+85
* target-i386: Perform set/reset_inhibit_irq inlineRichard Henderson2019-11-291-9/+28
* target-i386: Enable control registers for MPXRichard Henderson2019-11-291-0/+5
* target-i386: Implement XSAVEOPTRichard Henderson2019-11-291-3/+15
* target-i386: Add XSAVE extensionRichard Henderson2019-11-291-0/+54
* target-i386: Rearrange processing of 0F AERichard Henderson2019-11-291-52/+72
* target-i386: Rearrange processing of 0F 01Richard Henderson2019-11-291-223/+247
* target-i386: Split fxsave/fxrstor implementationRichard Henderson2019-11-291-2/+2
* target-i386: Deconstruct the cpu_T arrayRichard Henderson2019-11-291-614/+624
* target-i386: Tidy gen_add_A0_imRichard Henderson2019-11-291-22/+5
* target-i386: Rewrite leaveRichard Henderson2019-11-291-14/+15
* target-i386: Rewrite gen_enter inlineRichard Henderson2019-11-291-59/+34
* target-i386: Use gen_lea_v_seg in pusha/popaRichard Henderson2019-11-291-27/+23
* target-i386: Access segs via TCG registersRichard Henderson2019-11-291-24/+28
* target-i386: Use gen_lea_v_seg in stack subroutinesRichard Henderson2019-11-291-39/+13
* target-i386: Use gen_lea_v_seg in gen_lea_modrmRichard Henderson2019-11-291-59/+23
* target-i386: Introduce mo_stacksizeRichard Henderson2019-11-291-14/+10
* target-i386: Create gen_lea_v_segRichard Henderson2019-11-291-107/+53
* tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson2019-11-291-5/+5
* tcg: Remove lingering references to gen_opc_bufRichard Henderson2019-11-291-2/+1
* log: do not unnecessarily include qom/cpu.hPaolo Bonzini2019-11-291-0/+1
* x86: Clean up includesPeter Maydell2019-11-291-5/+1
* target-i386: Rename XMM_[BWLSDQ] helpers to ZMM_*Eduardo Habkost2019-11-291-94/+94
* target-i386: Rename struct XMMReg to ZMMRegEduardo Habkost2019-11-291-11/+11
* target-i386: Rename optimize_flags_init()Eduardo Habkost2019-11-291-1/+1
* Initial overlay of HQEMU 2.5.2 changes onto underlying 2.5.0 QEMU GIT tree2.5_overlayTimothy Pearson2019-11-291-15/+572
* target-i386: Fix mulx for identical target regsRichard Henderson2015-11-171-1/+3
* target-i386: tcg: Check right CPUID bits for clflushopt/pcommitEduardo Habkost2015-11-061-8/+20
* target-i386: tcg: Accept clwb instructionEduardo Habkost2015-11-061-1/+12
* target-*: Advance pc after recognizing a breakpointRichard Henderson2015-10-281-0/+5
* target-i386: Don't left shift negative constantEduardo Habkost2015-10-271-1/+1
* target-i386: Check CR4[DE] for processing DR4/DR5Richard Henderson2015-10-231-4/+6
* target-i386: Handle I/O breakpointsEduardo Habkost2015-10-231-1/+19
* tcg: Remove gen_intermediate_code_pcRichard Henderson2015-10-071-44/+5
* tcg: Pass data argument to restore_state_to_opcRichard Henderson2015-10-071-20/+6
* tcg: Add TCG_MAX_INSNSRichard Henderson2015-10-071-1/+5
* target-i386: Add cc_op state to insn_startRichard Henderson2015-10-071-1/+1
* target-*: Introduce and use cpu_breakpoint_testRichard Henderson2015-10-071-10/+7
* target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson2015-10-071-2/+3
* target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson2015-10-071-3/+2
* tcg: Rename debug_insn_start to insn_startRichard Henderson2015-10-071-1/+1
* target-i386: exception handling for seg_helper functionsPavel Dovgalyuk2015-09-151-33/+9
* target-i386: exception handling for memory helpersPavel Dovgalyuk2015-09-151-5/+0
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