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* tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt2015-09-111-1/+1
| | | | | | | | | | | | | | | | | | This is set to true when the index is for an instruction fetch translation. The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS acessors. All targets ignore it for now, and all other callers pass "false". This will allow targets who wish to split the mmu index between instruction and data accesses to do so. A subsequent patch will do just that for PowerPC. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* maint: remove unused include for signal.hDaniel P. Berrange2015-09-111-1/+0
| | | | | | | | | A number of files were including signal.h but not using any of the functions it provides Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* translate-all: Change tb_flush() env argument to cpuPeter Crosthwaite2015-07-091-1/+1
| | | | | | | | | | | | | | | All of the core-code usages of this API have the cpu pointer handy so pass it in. There are only 3 architecture specific usages (2 of which are commented out) which can just use ENV_GET_CPU() locally to get the cpu pointer. The reduces core code usage of the CPU env, which brings us closer to common-obj'ing these core files. Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* disas: Remove uses of CPU envPeter Crosthwaite2015-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | disas does not need to access the CPU env for any reason. Change the APIs to accept CPU pointers instead. Small change pattern needs to be applied to all target translate.c. This brings us closer to making disas.o a common-obj and less architecture specific in general. Cc: Richard Henderson <rth@twiddle.net> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Michael Walle <michael@walle.cc> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
* target-i386: Use correct memory attributes for ioport accessesPaolo Bonzini2015-06-051-6/+6
| | | | | | | | | | In order to do this, stop using the cpu_in*/out* helpers, and instead access address_space_io directly. cpu_in* and cpu_out* remain for usage in the monitor, in qtest, and in Xen. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-17/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | This is improved type checking for the translators -- it's no longer possible to accidentally swap arguments to the branch functions. Note that the code generating backends still manipulate labels as int. With notable exceptions, the scope of the change is just a few lines for each target, so it's not worth building extra machinery to do this change in per-target increments. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Anthony Green <green@moxielogic.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-6/+3
| | | | | | | | The method by which we count the number of ops emitted is going to change. Abstract that away into some inlines. Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+1
| | | | | Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: do not memcpy in and out of xmm_regsPaolo Bonzini2015-01-141-4/+4
| | | | | | | | | | | | | After the next patch, we will move the high parts of AVX and AVX512 registers in the same array as the SSE registers. This will make it impossible to memcpy an array of 128-bit values in and out of xmm_regs in one swoop. Use a for loop instead. Similarly, always use XMM_Q in translate.c. This avoids introducing bugs such as the one fixed in the previous patch. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-i386: fix movntsd on big-endian hostsPaolo Bonzini2015-01-141-1/+2
| | | | | | | | This was accessing an XMM register's low half without going through XMM_Q. Cc: qemu-stable@nongnu.org Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
| | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* translate: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-20/+30
| | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2014-12-151-0/+14
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Migration and linuxboot fixes for 2.2 regressions - valgrind/KVM support - small i386 patches - PCI SD host controller support - malloc/free cleanups from Markus (x86/scsi) - IvyBridge model - XSAVES support for KVM - initial patches from record/replay # gpg: Signature made Mon 15 Dec 2014 16:35:08 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (47 commits) sdhci: Support SDHCI devices on PCI sdhci: Define SDHCI PCI ids sdhci: Add "sysbus" to sdhci QOM types and methods sdhci: Remove class "virtual" methods sdhci: Set a default frequency clock serial: only resample THR interrupt on rising edge of IER.THRI serial: update LSR on enabling/disabling FIFOs serial: clean up THRE/TEMT handling serial: reset thri_pending on IER writes with THRI=0 linuxboot: fix loading old kernels kvm/apic: fix 2.2->2.1 migration target-i386: add Ivy Bridge CPU model target-i386: add f16c and rdrand to Haswell and Broadwell target-i386: add VME to all CPUs pc: add 2.3 machine types i386: do not cross the pages boundaries in replay mode cpus: make icount warp behave well with respect to stop/cont timer: introduce new QEMU_CLOCK_VIRTUAL_RT clock cpu-exec: invalidate nocache translation if they are interrupted icount: introduce cpu_get_icount_raw ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i386: do not cross the pages boundaries in replay modePavel Dovgalyuk2014-12-151-0/+14
| | | | | | | | | | | | | | | | | | | | | | This patch denies crossing the boundary of the pages in the replay mode, because it can cause an exception. Do it only when boundary is crossed by the first instruction in the block. If current instruction already crossed the bound - it's ok, because an exception hasn't stopped this code. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | target-i386: fix icount processing for repz instructionsPavel Dovgalyuk2014-12-141-2/+14
|/ | | | | | | | | | | | | | | TCG generates optimized code for i386 repz instructions in single step mode. It means that when ecx becomes 0, execution of the string instruction breaks immediately without an additional iteration for ecx==0 (which will only check ecx and set the flags). Omitting this iteration leads to different instructions counting in singlestep mode and in normal execution. This patch disables optimization of this last iteration for icount mode which should be deterministic. v2: inverted the condition and formatted the comment Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
* i386: fix breakpoints handling in icount modePavel Dovgalyuk2014-10-311-1/+2
| | | | | | | | | | | This patch fixes instructions counting when execution is stopped on breakpoint (e.g. set from gdb). Without a patch extra instruction is translated and icount is incremented by invalid value (which equals to number of executed instructions + 1). Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru>
* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
| | | | | Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* target-i386/translate.c: Remove unused tcg_gen_lshift()Peter Maydell2014-06-101-8/+0
| | | | | | | The function tcg_gen_lshift() is unused; remove it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-0/+1
| | | | | | | | | | This will collect all load and store helpers soon. For now it is just a replacement for softmmu_exec.h, which this patch stops including directly, but we also include it where this will be necessary in order to simplify the next patch. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-3/+2
| | | | | | | | | | Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Preserve the Z bit for bt/bts/btr/btcRichard Henderson2014-05-121-9/+31
| | | | | | | | | Older Intel manuals (pre-2010) and current AMD manuals describe Z as undefined, but newer Intel manuals describe Z as unchanged. Cc: qemu-stable@nongnu.org Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-2/+2
| | | | | | | | Most targets were using offsetof(CPUFooState, breakpoints) to determine how much of CPUFooState to clear on reset. Use the next field after CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise. Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Fix ucomis and comis memory accessRichard Henderson2014-02-281-10/+36
| | | | | | | | We were loading 16 bytes for both single and double-precision scalar comparisons. Reported-by: Alexander Bluhm <bluhm@openbsd.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Fix CC_OP_CLR vs PFRichard Henderson2014-02-281-1/+1
| | | | | | | | | Parity should be set for a zero result. Cc: qemu-stable@nongnu.org Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Fix I/O bitmap checks for in/outKevin Wolf2014-02-191-0/+2
| | | | | | | | | | | | | | Commit 1b90d56e changed the implementation of in/out imm to not assign the accessed port number to cpu_T[0] as it appeared unnecessary. However, currently gen_check_io() makes use of cpu_T[0] to implement the I/O bitmap checks, so it's in fact still used and the change broke the check, leading to #GP in legitimate cases (and probably also allowing access to ports that shouldn't be allowed). This patch reintroduces the missing assignment for these cases. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* target-i386: Tidy ljmpRichard Henderson2014-01-071-2/+1
| | | | | | | Remove an unnecessary move opcode. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Rename gen_op_jmp_T0 to gen_op_jmp_vRichard Henderson2014-01-071-9/+9
| | | | | | | And make the destination argument explicit. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Tidy some size computationRichard Henderson2014-01-071-3/+3
| | | | | | | Clean up relics of multiple size domains: - MO_16 + 1 => - 1 + 1 => 0. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_mov_reg_A0Richard Henderson2014-01-071-6/+1
| | | | | | | Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_mov_TN_regRichard Henderson2014-01-071-64/+59
| | | | | | | Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_addl_T0_T1Richard Henderson2014-01-071-8/+3
| | | | | | | Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_mov_reg_T1Richard Henderson2014-01-071-18/+13
| | | | | | | Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_mov_reg_T0Richard Henderson2014-01-071-70/+65
| | | | | | | Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Tidy cpu_regs initializationRichard Henderson2014-01-071-51/+36
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target_i386: Clean up gen_pop_T0Richard Henderson2014-01-071-47/+37
| | | | | | | | | | | Reduce ifdefs, share more code between paths, reduce the number of TCG ops generated. Avoid re-computing the size of the operation across gen_pop_T0 and gen_pop_update. Add forgotten zero-extension in the TARGET_X86_64, !CODE64, ss32 case. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Combine gen_push_T* into gen_push_vRichard Henderson2014-01-071-74/+32
| | | | | | | | | | Reduce ifdefs, share more code between paths, reduce the number of TCG ops generated. Add forgotten zero-extension in the TARGET_X86_64, !CODE64, ss32 case. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Tidy addr16 code in gen_lea_modrmRichard Henderson2014-01-071-18/+16
| | | | | | | | Unlike the addr32, there was no bug. But we can use the same technique to reduce the number of TCG ops. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Change dflag to TCGMemOpRichard Henderson2014-01-071-284/+216
| | | | | | | | | | | | Changing the domain to TCGMemOp makes it easier to interoperate with other portions of the rest of the translator. We now only have one domain for size operands inside the translator, which makes things less confusing all the way around. There are still a number of helpers that continue to use the log2-1 domain. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Change gen_op_mov_reg_A0 size parameter to TCGMemOpRichard Henderson2014-01-071-24/+8
| | | | | | | | Change the domain of the parameter and update all callers. Which lets us defer completely to gen_op_mov_reg_v. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Change aflag to TCGMemOpRichard Henderson2014-01-071-91/+87
| | | | | | | | Changing the domain to TCGMemOp makes it easier to interoperate with other portions of the rest of the translator. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Change gen_op_j*z_ecx size parameter to TCGMemOpRichard Henderson2014-01-071-10/+10
| | | | | | | Change the domain of the parameter and update all callers. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Change gen_op_add_reg_* size parameter to TCGMemOpRichard Henderson2014-01-071-54/+22
| | | | | | | | | | | | | | These functions used the aflags/dflags domain, which is log2-1 of the byte size. Confusingly, they used enumeration values from the log2 domain. Change the domain of the parameter and update all callers. Since we're now in a common domain, defer the deposit/extend/mov decision to gen_op_mov_reg_v. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Use TCGMemOp for 'ot' variablesRichard Henderson2014-01-071-50/+70
| | | | | | | | | | | | | | | | | The 'ot' variables (operand type?) hold the log2(byte size) of the operand being manipulated. This is the same as the MO_SIZE subset of the TCGMemOp. Indeed, we often pass 'ot' to the tcg_gen_qemu_ld/st functions. Changing the type from 'int' makes it easier to see what domain the variable should be. This does require adding some default cases to some switch statements, to avoid the 'unhandled enumeration value' warning that would result from the change of type. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_andl_A0_ffffRichard Henderson2014-01-071-20/+13
| | | | | | | | Replace it with tcg_gen_ext16u_tl, and in two cases merge with a previous move from cpu_regs. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_movl_T0_T1Richard Henderson2014-01-071-6/+1
| | | | | | | Replace it with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_andl_T0_imRichard Henderson2014-01-071-11/+9
| | | | | | | Replace it with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_andl_T0_ffffRichard Henderson2014-01-071-25/+18
| | | | | | | | | Replace it with tcg_gen_ext16u_tl. In four places we can combine that with a previous move into cpu_T[0], and in one place we can infer that the zero-extension has already happened via the previous load. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_movtl_T*_imRichard Henderson2014-01-071-13/+3
| | | | | | | Propagate the definitions into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_mov*_A0_imRichard Henderson2014-01-071-15/+2
| | | | | | | | Propagate the definitions into all users. In two cases, this allows us to share code between the 32-bit and 64-bit immediate moves. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Remove gen_op_movl_T0_im*Richard Henderson2014-01-071-20/+10
| | | | | | | | | Propagate the definitions into all users. The only time that gen_op_movl_T1_imu was used, the input was type 'unsigned', so the replacement works identically. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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