summaryrefslogtreecommitdiffstats
path: root/target-i386/helper.c
Commit message (Collapse)AuthorAgeFilesLines
* Fix "info registers" under kvm.balrog2009-03-041-0/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6684 c046a42c-6fe2-441c-8c8c-71466251a162
* KVM: CPUID takes ecx as input value for some functions (Amit Shah)aliguori2009-02-091-17/+17
| | | | | | | | | | | | | | The CPUID instruction takes the value of ECX as an input parameter in addition to the value of EAX as the count for functions 4, 0xb and 0xd. Make sure we pass the value to the instruction. Also convert to the qemu-style whitespace for the surrounding code. Signed-off-by: Amit Shah <amit.shah@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6565 c046a42c-6fe2-441c-8c8c-71466251a162
* targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori2009-02-051-2/+0
| | | | | | | | Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
* Add phenom CPU descriptor (Alexander Graf)aliguori2009-02-021-0/+28
| | | | | | | | | | | | | | | | | | As part of my ongoing effort to make nested SVM useful, I started working to get VMware ESX run inside KVM. VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulate a machine that officially supports SVM and should thus exploit the powers of nested virtualization. This patch adds a Phenom CPU identifier, that resembles a real-world phenom CPU as closely as possible. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6501 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix a typo in ext2_feature_name (Carl-Daniel Hailfinger)aliguori2009-01-291-1/+1
| | | | | | | | | Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6474 c046a42c-6fe2-441c-8c8c-71466251a162
* Log reset events (Jan Kiszka)aliguori2009-01-261-0/+5
| | | | | | | | | | | | | | Original idea&code by Kevin Wolf, split-up in two patches and added more archs. This patch introduces a flag to log CPU resets. Useful for tracing unexpected resets (such as those triggered by x86 triple faults). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6452 c046a42c-6fe2-441c-8c8c-71466251a162
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
| | | | | | | | | | The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
* Use the ARRAY_SIZE() macro where appropriate.malc2008-12-221-2/+2
| | | | | | | | | Change from v1: Avoid changing the existing coding style in certain files. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
* x86 cleanupblueswir12008-12-131-8/+0
| | | | | | | | | | | | | | | | | | | Remove some unnecessary includes, add needed includes, move prototypes to cpu.h to suppress missing prototype warnings. Remove unused functions and prototypes (cpu_x86_flush_tlb, cpu_lock, cpu_unlock, restore_native_fp_state, save_native_fp_state). Make some functions and data static (f15rk, parity_table, rclw_table, rclb_table, raise_interrupt, fpu_raise_exception), they are not used outside op_helper.c anymore. Make some x86_64 and user only code conditional to avoid warnings. Document where each function is implemented in cpu.h and exec.h. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6005 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix register name typo in dumping debug registers (Jan Kiszka)aliguori2008-12-021-2/+2
| | | | | | | | | Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5855 c046a42c-6fe2-441c-8c8c-71466251a162
* Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori2008-11-251-1/+1
| | | | | | | | | | | | | This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the code and also fixing a use after release issue in cpu_break/watchpoint_remove_all. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
* x86: Dump debug registers (Jan Kiszka)aliguori2008-11-181-0/+7
| | | | | | | | | | | | As the debug registers are no longer dummies, let's include their current state into the 'info registers' output and other register dumps. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5748 c046a42c-6fe2-441c-8c8c-71466251a162
* x86: Debug register emulation (Jan Kiszka)aliguori2008-11-181-31/+138
| | | | | | | | | | | | | | | | Built on top of previously enhanced breakpoint/watchpoint support, this patch adds full debug register emulation for the x86 architecture. Many corner cases were considered, and the result was successfully tested inside a Linux guest with gdb, but I won't be surprised if one or two scenarios still behave differently in reality. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5747 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG variable type checking.pbrook2008-11-171-0/+1
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
* x86: fix warning without CONFIG_KVM (Mark McLoughlin)aliguori2008-11-131-2/+2
| | | | | | | | | | | | | | Warning is: target-i386/helper.c: In function `cpu_x86_cpuid': target-i386/helper.c:1373: warning: implicit declaration of function `host_cpuid' Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5718 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix CPUID ext2 features masking (Avi Kivity)aliguori2008-11-131-1/+1
| | | | | | | | | | | Typo. Exposes rdtscp which kills some guests. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5717 c046a42c-6fe2-441c-8c8c-71466251a162
* x86 CPUID extended family/model (Andre Przywara).balrog2008-11-101-2/+7
| | | | | | | | | | | | | | | x86 CPUs feature extended family/model bits in CPUID leaf 0000_0001|EAX. Refer to page 10 in: http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf Those bits are necessary to model newer AMD CPUs: -cpu qemu64,family=15,model=65,stepping=3 or -cpu qemu64,family=16,model=4,stepping=2 Signed-off-by: Andre Przywara <andre.przywara@amd.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5664 c046a42c-6fe2-441c-8c8c-71466251a162
* Add KVM support to QEMUaliguori2008-11-051-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds very basic KVM support. KVM is a kernel module for Linux that allows userspace programs to make use of hardware virtualization support. It current supports x86 hardware virtualization using Intel VT-x or AMD-V. It also supports IA64 VT-i, PPC 440, and S390. This patch only implements the bare minimum support to get a guest booting. It has very little impact the rest of QEMU and attempts to integrate nicely with the rest of QEMU. Even though this implementation is basic, it is significantly faster than TCG. Booting and shutting down a Linux guest: w/TCG: 1:32.36 elapsed 84% CPU w/KVM: 0:31.14 elapsed 59% CPU Right now, KVM is disabled by default and must be explicitly enabled with -enable-kvm. We can enable it by default later when we have had better testing. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5627 c046a42c-6fe2-441c-8c8c-71466251a162
* Split CPUID from op_helperaliguori2008-11-051-0/+166
| | | | | | | | | | | | KVM needs to call CPUID from outside of the TCG code. This patch splits out the CPUID logic into a separate helper that both the op helper and KVM can call. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5626 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix cpuid ext_features value for Atom N270 (Blue Swirl).balrog2008-10-281-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5558 c046a42c-6fe2-441c-8c8c-71466251a162
* target-i386: Add Core Duo Definitionaurel322008-10-141-1/+20
| | | | | | | | | | | | | | | | | | | | | | | This patch adds a CPU definition for the Core Duo CPU. I tried to resemble the original as closely as possible and document what features are missing still. This patch enables the use of a recent CPU definition on 32 bit platforms. It also fixes two issues that went along the line: - invalid xlevel in core2duo spec While looking though the CPUIDs again, I found that xlevel is actually 8. - non-PSE36 support The CoreDuo CPUID does not expose the PSE36 capability, but CPUID 0x80000008 is tied to 36 bits. This broke Windows XP installation for me, so I just set it to 32 bits width when PSE36 is not available. The original CPU also exposes 32 bit width in CPUID 0x80000008. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5488 c046a42c-6fe2-441c-8c8c-71466251a162
* My core2duo patch introduced a vague statement of "missing features" in pbrook2008-09-291-7/+10
| | | | | | | | | | | | | | | | | | | | the CPUID specification. This patch addresses this by specifying exactly what is missing. While going along the missing CPUID entries I also stumbled across invalid and missing CPUID #defines while comparing them to the Intel Documentation. This patch also addresses these. I found them too minor to split them up in a separate patch. Furthermore I looked through CPUID functions > 5 and realized that it should be safe to bump the level to 10. I tried booting Linux with that and it worked fine. Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5350 c046a42c-6fe2-441c-8c8c-71466251a162
* Rename -cpu atom to -cpu n270.balrog2008-09-281-1/+1
| | | | | | | | As noticed by Alexander Graf Atom is a name of a series with varying features. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5341 c046a42c-6fe2-441c-8c8c-71466251a162
* Add Atom (x86) cpu identification.balrog2008-09-251-3/+24
| | | | | | | Also add SSSE3 to Core2 features. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5319 c046a42c-6fe2-441c-8c8c-71466251a162
* Core 2 Duo specification (Alexander Graf).balrog2008-09-251-0/+18
| | | | | | | | | | | | | | | This patch adds a Core 2 Duo CPU to the available CPU types. The CPU definition tries to resemble a real CPU as good as possible, whilst not exposing features qemu does not implement. The patch also includes some minor additions that Core 2 Duo CPUs have: - New MSR: MSR_IA32_PERF_STATUS - CPUID up to level 5 (cache info and mwait) Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5317 c046a42c-6fe2-441c-8c8c-71466251a162
* Clean up vendor identification (Alexander Graf).balrog2008-09-251-6/+6
| | | | | | | | | | | Right now CPU vendor identification contains a lot of magic numbers. The patch cleans them up to defines, so we can identify the CPU later on without copying magic numbers. Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5316 c046a42c-6fe2-441c-8c8c-71466251a162
* Use qemu_free() on env instead of free.balrog2008-09-251-1/+1
| | | | | | | Fixes a glibc Abort on qemu-x86_64 -cpu foo. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5314 c046a42c-6fe2-441c-8c8c-71466251a162
* i386: Catch all non-present ptes in cpu_get_phys_page_debug (Jan Kiszka)aliguori2008-08-181-0/+2
| | | | | | | | | | | | It helps debugging guests when yet unmapped pages are correctly reported as, well, unmapped. Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5025 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix task register type after reset (Avi Kivity)aliguori2008-07-231-1/+1
| | | | | | | | | | | Obvious typo that breaks reboots. Signed-off-by: Avi Kivity <avi@qumranet.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4926 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix constant truncation, spotted by Jindrich Makovicka.ths2008-07-031-3/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4832 c046a42c-6fe2-441c-8c8c-71466251a162
* added model_id and vendor cpu model options (initial patch by Dan ↵bellard2008-06-201-11/+29
| | | | | | Kenigsberg) - various cleanup git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4757 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix i386 segment descriptor types on reset (Avi Kivity)bellard2008-06-061-9/+15
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4686 c046a42c-6fe2-441c-8c8c-71466251a162
* reworked SVM interrupt handling logic - fixed vmrun EIP saved value - ↵bellard2008-06-041-1/+1
| | | | | | reworked cr8 handling - added CPUState.hflags2 git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4662 c046a42c-6fe2-441c-8c8c-71466251a162
* moved halted field to CPU_COMMONbellard2008-05-281-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
* SVM reworkbellard2008-05-281-5/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4605 c046a42c-6fe2-441c-8c8c-71466251a162
* consistent naming for i386 TCG helper filebellard2008-05-281-5193/+1011
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4603 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix off-by-one unwinding error.pbrook2008-05-251-5/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
* cmpxchg8b fix - added cmpxchg16bbellard2008-05-221-2/+24
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4522 c046a42c-6fe2-441c-8c8c-71466251a162
* fxsave/fxrstor 64 bit fixbellard2008-05-221-2/+20
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4520 c046a42c-6fe2-441c-8c8c-71466251a162
* convert eflags manipulation insns to TCGbellard2008-05-211-0/+14
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4515 c046a42c-6fe2-441c-8c8c-71466251a162
* converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LARbellard2008-05-211-12/+12
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4513 c046a42c-6fe2-441c-8c8c-71466251a162
* converted INTO/CMPXCHG8B to TCGbellard2008-05-211-0/+9
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4510 c046a42c-6fe2-441c-8c8c-71466251a162
* converted MUL/IMUL to TCGbellard2008-05-211-24/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4508 c046a42c-6fe2-441c-8c8c-71466251a162
* BSR/BSF TCG conversionbellard2008-05-171-0/+31
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4477 c046a42c-6fe2-441c-8c8c-71466251a162
* moved eflags computation outside op.cbellard2008-05-171-0/+79
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4472 c046a42c-6fe2-441c-8c8c-71466251a162
* converted condition code supprot to TCG - converted shift ops to TCGbellard2008-05-171-0/+19
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4470 c046a42c-6fe2-441c-8c8c-71466251a162
* converted more helpers to TCG - fixed some SVM issuesbellard2008-05-151-130/+179
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4459 c046a42c-6fe2-441c-8c8c-71466251a162
* converted more helpers to TCGbellard2008-05-121-75/+351
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4447 c046a42c-6fe2-441c-8c8c-71466251a162
* converted x87 FPU ops to TCGbellard2008-05-121-21/+425
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4444 c046a42c-6fe2-441c-8c8c-71466251a162
* converted SSE/MMX ops to TCGbellard2008-05-121-0/+29
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4441 c046a42c-6fe2-441c-8c8c-71466251a162
OpenPOWER on IntegriCloud