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* target-i386: n270 can MOVBEBorislav Petkov2013-05-061-1/+2
| | | | | | | | | | | The Atom core (cpu name "n270" in QEMU speak) supports MOVBE. This is needed when booting 3.8 and later linux kernels built with the MATOM target because we require MOVBE in order to boot properly now. Signed-off-by: Borislav Petkov <bp@suse.de> [ehabkost: added compat code to disable MOVBE on pc-*-1.4 and older] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Introduce generic CPUID feature compat functionEduardo Habkost2013-05-061-0/+26
| | | | | | | | Introduce x86_cpu_compat_set_features(), that can be used to set/unset feature bits on specific CPU models for machine-type compatibility. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Change CPUID model of 486 to 8Andreas Färber2013-05-061-1/+1
| | | | | | | | | | | | | This changes the model number of 486 to 8 (DX4) which matches the feature set presented, and actually has the CPUID instruction. This adds a compatibility property, to keep model=0 on pc-*-1.4 and older. Signed-off-by: H. Peter Anvin <hpa@zytor.com> [AF: Add compat_props entry] Tested-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Emulate X86CPU subclasses for global propertiesAndreas Färber2013-05-061-0/+9
| | | | | | | | | After initializing the object from its x86_def_t and before setting any additional -cpu arguments, set any global properties for the designated subclass <name>-{i386,x86_64}-cpu. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Add "filtered-features" property to X86CPUEduardo Habkost2013-05-061-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This property will contain all the features that were removed from the CPU because they are not supported by the host. This way, libvirt or other management tools can emulate the check/enforce behavior by checking if filtered-properties is all zeroes, before starting the guest. Example output where some features were missing: $ qemu-system-x86_64 -enable-kvm -cpu Haswell,check -S \ -qmp unix:/tmp/m,server,nowait warning: host doesn't support requested feature: CPUID.01H:ECX.fma [bit 12] warning: host doesn't support requested feature: CPUID.01H:ECX.movbe [bit 22] warning: host doesn't support requested feature: CPUID.01H:ECX.tsc-deadline [bit 24] warning: host doesn't support requested feature: CPUID.01H:ECX.xsave [bit 26] warning: host doesn't support requested feature: CPUID.01H:ECX.avx [bit 28] warning: host doesn't support requested feature: CPUID.07H:EBX.fsgsbase [bit 0] warning: host doesn't support requested feature: CPUID.07H:EBX.bmi1 [bit 3] warning: host doesn't support requested feature: CPUID.07H:EBX.hle [bit 4] warning: host doesn't support requested feature: CPUID.07H:EBX.avx2 [bit 5] warning: host doesn't support requested feature: CPUID.07H:EBX.smep [bit 7] warning: host doesn't support requested feature: CPUID.07H:EBX.bmi2 [bit 8] warning: host doesn't support requested feature: CPUID.07H:EBX.erms [bit 9] warning: host doesn't support requested feature: CPUID.07H:EBX.invpcid [bit 10] warning: host doesn't support requested feature: CPUID.07H:EBX.rtm [bit 11] [...] $ ./QMP/qmp --path=/tmp/m \ qom-get --path=/machine/icc-bridge/icc/child[0] \ --property=filtered-features item[0].cpuid-register: EDX item[0].cpuid-input-eax: 2147483658 item[0].features: 0 item[1].cpuid-register: EAX item[1].cpuid-input-eax: 1073741825 item[1].features: 0 item[2].cpuid-register: EDX item[2].cpuid-input-eax: 3221225473 item[2].features: 0 item[3].cpuid-register: ECX item[3].cpuid-input-eax: 2147483649 item[3].features: 0 item[4].cpuid-register: EDX item[4].cpuid-input-eax: 2147483649 item[4].features: 0 item[5].cpuid-register: EBX item[5].cpuid-input-eax: 7 item[5].features: 4025 item[5].cpuid-input-ecx: 0 item[6].cpuid-register: ECX item[6].cpuid-input-eax: 1 item[6].features: 356519936 item[7].cpuid-register: EDX item[7].cpuid-input-eax: 1 item[7].features: 0 Example output when no feature is missing: $ qemu-system-x86_64 -enable-kvm -cpu Nehalem,enforce -S \ -qmp unix:/tmp/m,server,nowait [...] $ ./QMP/qmp --path=/tmp/m \ qom-get --path=/machine/icc-bridge/icc/child[0] \ --property=filtered-features item[0].cpuid-register: EDX item[0].cpuid-input-eax: 2147483658 item[0].features: 0 item[1].cpuid-register: EAX item[1].cpuid-input-eax: 1073741825 item[1].features: 0 item[2].cpuid-register: EDX item[2].cpuid-input-eax: 3221225473 item[2].features: 0 item[3].cpuid-register: ECX item[3].cpuid-input-eax: 2147483649 item[3].features: 0 item[4].cpuid-register: EDX item[4].cpuid-input-eax: 2147483649 item[4].features: 0 item[5].cpuid-register: EBX item[5].cpuid-input-eax: 7 item[5].features: 0 item[5].cpuid-input-ecx: 0 item[6].cpuid-register: ECX item[6].cpuid-input-eax: 1 item[6].features: 0 item[7].cpuid-register: EDX item[7].cpuid-input-eax: 1 item[7].features: 0 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Introduce X86CPU::filtered_features fieldEduardo Habkost2013-05-061-3/+6
| | | | | | | | | This field will contain the feature bits that were filtered out because of missing host support. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Add "feature-words" property to X86CPUEduardo Habkost2013-05-061-12/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This property will be useful for libvirt, as libvirt already has logic based on low-level feature bits (not feature names), so it will be really easy to convert the current libvirt logic to something using the "feature-words" property. The property will have two main use cases: - Checking host capabilities, by checking the features of the "host" CPU model - Checking which features are enabled on each CPU model Example output: $ ./QMP/qmp --path=/tmp/m \ qom-get --path=/machine/icc-bridge/icc/child[0] \ --property=feature-words item[0].cpuid-register: EDX item[0].cpuid-input-eax: 2147483658 item[0].features: 0 item[1].cpuid-register: EAX item[1].cpuid-input-eax: 1073741825 item[1].features: 0 item[2].cpuid-register: EDX item[2].cpuid-input-eax: 3221225473 item[2].features: 0 item[3].cpuid-register: ECX item[3].cpuid-input-eax: 2147483649 item[3].features: 101 item[4].cpuid-register: EDX item[4].cpuid-input-eax: 2147483649 item[4].features: 563346425 item[5].cpuid-register: EBX item[5].cpuid-input-eax: 7 item[5].features: 0 item[5].cpuid-input-ecx: 0 item[6].cpuid-register: ECX item[6].cpuid-input-eax: 1 item[6].features: 2155880449 item[7].cpuid-register: EDX item[7].cpuid-input-eax: 1 item[7].features: 126614521 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Use FeatureWord loop on filter_features_for_kvm()Eduardo Habkost2013-05-061-17/+7
| | | | | | | | | | Instead of open-coding the filtering code for each feature word, change the existing code to use the feature_word_info array, that has exactly the same CPUID eax/ecx/register values for each feature word. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Add ECX information to FeatureWordInfoEduardo Habkost2013-05-061-3/+7
| | | | | | | | FEAT_7_0_EBX uses ECX as input, so we have to take that into account when reporting feature word values. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Replace cpuid_*features fields with a feature word arrayEduardo Habkost2013-05-021-167/+162
| | | | | | | | | | | | | | | | | | | | | | | | | This replaces the feature-bit fields on both X86CPU and x86_def_t structs with an array. With this, we will be able to simplify code that simply does the same operation on all feature words (e.g. kvm_check_features_against_host(), filter_features_for_kvm(), add_flagname_to_bitmaps(), CPU feature-bit property lookup/registration, and the proposed "feature-words" property) The following field replacements were made on X86CPU and x86_def_t: (cpuid_)features -> features[FEAT_1_EDX] (cpuid_)ext_features -> features[FEAT_1_ECX] (cpuid_)ext2_features -> features[FEAT_8000_0001_EDX] (cpuid_)ext3_features -> features[FEAT_8000_0001_ECX] (cpuid_)ext4_features -> features[FEAT_C000_0001_EDX] (cpuid_)kvm_features -> features[FEAT_KVM] (cpuid_)svm_features -> features[FEAT_SVM] (cpuid_)7_0_ebx_features -> features[FEAT_7_0_EBX] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Break CPUID feature definition linesEduardo Habkost2013-05-021-90/+180
| | | | | | | | | | Break lines on kvm_check_features_against_host(), kvm_cpu_fill_host(), and builtin_x86_defs, so they don't get too long once the *_features fields are replaced by an array. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Group together level, xlevel, xlevel2 fieldsEduardo Habkost2013-05-011-2/+2
| | | | | | | | Consolidate level, xlevel, xlevel2 fields in x86_def_t and CPUX86State. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Move APIC to ICC busIgor Mammedov2013-05-011-13/+3
| | | | | | | | | | | It allows APIC to be hotplugged. * map APIC's mmio at board level if it is present * do not register mmio region for each APIC, since only one is used/mapped Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Attach ICC bus to CPU on its creationIgor Mammedov2013-05-011-2/+13
| | | | | | | X86CPU should have parent bus so it could provide bus for child APIC. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move cpu_write_elfXX_note() functions to CPUStateJens Freimann2013-05-011-0/+6
| | | | | | | | | Convert cpu_write_elfXX_note() functions to CPUClass methods and pass CPUState as argument. Update target-i386 accordingly. Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> [AF: Retain stubs as CPUClass' default method implementation; style changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Do not allow to set apic-id once CPU is realizedIgor Mammedov2013-05-011-0/+7
| | | | | | Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Introduce apic-id CPU propertyIgor Mammedov2013-05-011-0/+40
| | | | | | | | | The property is used from board level to set APIC ID for CPUs it creates. Do so in a new pc_new_cpu() helper, to be reused for hot-plug. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Introduce feat2prop() for CPU propertiesIgor Mammedov2013-05-011-4/+15
| | | | | | | | | This helper replaces '_' with '-' in a uniform way. As a side effect, even custom mappings must use '-' now. Signed-off-by: Igor Mammedov <imammedo@redhat.com> [AF: Split off; operate on NUL-terminated string rather than '=' delimiter] Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Introduce get_arch_id() method and override it for X86CPUIgor Mammedov2013-05-011-0/+10
| | | | | | | | | | | | | | get_arch_id() adds possibility for generic code to get a guest-visible CPU ID without accessing CPUArchState. If derived classes don't override it, it will return cpu_index. Override it on target-i386 in X86CPU to return the APIC ID. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Split out CPU creation and features parsingIgor Mammedov2013-04-161-3/+15
| | | | | | | | | | | | | Move CPU creation and features parsing into a separate cpu_x86_create() function, so that board would be able to set board-specific CPU properties before CPU is realized. Keep cpu_x86_init() for compatibility with the code that uses cpu_init() and doesn't need to modify CPU properties. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386/cpu.c: Coding style fixesEduardo Habkost2013-04-161-3/+4
| | | | | | | | | | * Add braces to 'if' statements; * Remove last TAB character from the source. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Changed whitespace] Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Split APIC creation from initialization in x86_cpu_realizefn()Igor Mammedov2013-04-161-3/+21
| | | | | | | | | | | | | | | | | | | | | | When APIC is hotplugged during CPU hotplug, device_set_realized() calls device_reset() on it. And if QEMU runs in KVM mode, following call chain will fail: apic_reset_common() -> kvm_apic_vapic_base_update() -> kvm_vcpu_ioctl(cpu->kvm_fd,...) due to cpu->kvm_fd not being initialized yet. cpu->kvm_fd is initialized during qemu_init_vcpu() but x86_cpu_apic_init() can't be moved after it because kvm_init_vcpu() -> kvm_arch_reset_vcpu() relies on APIC to determine if CPU is BSP for setting initial env->mp_state. So split APIC device creation from its initialization and realize APIC after CPU is created, when it's safe to call APIC's reset method. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Consolidate error propagation in x86_cpu_realizefn()Igor Mammedov2013-04-161-7/+10
| | | | | | | Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Improve -cpu ? features outputJan Kiszka2013-04-161-8/+6
| | | | | | | | | We were missing a bunch of feature lists. Fix this by simply dumping the meta list feature_word_info. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Fix including "host" in -cpu ? outputJan Kiszka2013-04-161-3/+6
| | | | | | | | | | | | kvm_enabled() cannot be true at this point because accelerators are initialized much later during init. Also, hiding this makes it very hard to discover for users. Simply dump unconditionally if CONFIG_KVM is set. Add explanation for "host" CPU type. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: add AES-NI instructionsAurelien Jarno2013-04-131-3/+3
| | | | | | Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: enable PCLMULQDQ on Westmere CPUAurelien Jarno2013-04-131-1/+1
| | | | | | | | The PCLMULQDQ instruction has been introduced on the Westmere CPU. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-i386: add pclmulqdq instructionAurelien Jarno2013-04-131-10/+9
| | | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* hw: move headers to include/Paolo Bonzini2013-04-081-2/+2
| | | | | | | | | Many of these should be cleaned up with proper qdev-/QOM-ification. Right now there are many catch-all headers in include/hw/ARCH depending on cpu.h, and this makes it necessary to compile these files per-target. However, fixing this does not belong in these patches. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* extract/unify the constant 0xfee00000 as APIC_DEFAULT_ADDRESSLaszlo Ersek2013-04-041-3/+1
| | | | | | | | | | | | | A common dependency of the constant's current users: - hw/apic_common.c - hw/i386/kvmvapic.c - target-i386/cpu.c is "target-i386/cpu.h". Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1363821803-3380-9-git-send-email-lersek@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* target-i386: Check for host features before filter_features_for_kvm()Eduardo Habkost2013-04-031-3/+3
| | | | | | | | | | | | | | | | commit 5ec01c2e96910e1588d1a0de8609b9dda7618c7f broke "-cpu ..,enforce", as it has moved kvm_check_features_against_host() after the filter_features_for_kvm() call. filter_features_for_kvm() removes all features not supported by the host, so this effectively made kvm_check_features_against_host() impossible to fail. This patch changes the call so we check for host feature support before filtering the feature bits. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-id: 1364935692-24004-1-git-send-email-ehabkost@redhat.com Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* target-i386: enable SSE4.1 and SSE4.2 in TCG modeAurelien Jarno2013-04-011-6/+7
| | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-121-0/+1
| | | | | | | | | | This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-121-1/+1
| | | | | | | | | | Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Update VMStateDescription to X86CPUAndreas Färber2013-03-121-0/+2
| | | | | | | | Expose vmstate_cpu as vmstate_x86_cpu and hook it up to CPUClass::vmsd. Adapt opaques and VMState fields to X86CPU. Drop cpu_{save,load}(). Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* Fix guest OS hang when 64bit PCI bar presentAlexey Korolev2013-02-271-1/+2
| | | | | | | | | | | | | | | | | | | | This patch addresses the issue fully described here: http://lists.nongnu.org/archive/html/qemu-devel/2013-02/msg01804.html Linux kernels prior to 2.6.36 do not disable the PCI device during enumeration process. Since lower and higher parts of a 64bit BAR are programmed separately this leads to qemu receiving a request to occupy a completely wrong address region for a short period of time. We have found that the boot process screws up completely if kvm-apic range is overlapped even for a short period of time (it is fine for other regions though). This patch raises the priority of the kvm-apic memory region, so it is never pushed out by PCI devices. The patch is quite safe as it does not touch memory manager. Signed-off-by: Alexey Korolev <akorolex@gmail.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* target-i386: Implement ADX extensionRichard Henderson2013-02-191-2/+2
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Implement ANDNRichard Henderson2013-02-181-5/+5
| | | | | | | As this is the first of the BMI insns to be implemented, this carries quite a bit more baggage than normal. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Implement MOVBERichard Henderson2013-02-181-3/+13
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Split command line parsing out of cpu_x86_register()Andreas Färber2013-02-161-40/+40
| | | | | | | | | | | | | | | In order to instantiate a CPU subtype we will need to know which type, so move the cpu_model splitting into cpu_x86_init(). Parameters need to be set on the X86CPU instance, so move cpu_x86_parse_featurestr() into cpu_x86_init() as well. This leaves cpu_x86_register() operating on the model name only. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Move cpu_x86_init()Andreas Färber2013-02-161-1/+25
| | | | | | | | | | | Consolidate CPU functions in cpu.c. Allows to make cpu_x86_register() static. No functional changes. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Add CPUArchState pointer to CPUStateAndreas Färber2013-02-161-0/+1
| | | | | | | | | | | | The target-specific ENV_GET_CPU() macros have allowed us to navigate from CPUArchState to CPUState. The reverse direction was not supported. Avoid introducing CPU_GET_ENV() macros by initializing an untyped pointer that is initialized in derived instance_init functions. The field may not be called "env" due to it being poisoned. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Update X86CPU to QOM realizefnAndreas Färber2013-02-161-4/+15
| | | | | | | | | | | | | | Adapt the signature of x86_cpu_realize(), hook up to DeviceClass::realize and set realized = true in cpu_x86_init(). The QOM realizefn cannot depend on errp being non-NULL as in cpu_x86_init(), so use a local Error to preserve error handling behavior on APIC initialization errors. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Invoke parent's realizefn] Signed-off-by: Andreas Färber <afaerber@suse.de>
* error: Strip trailing '\n' from error string arguments (again)Markus Armbruster2013-02-111-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6daf194d and be62a2eb got rid of a bunch, but they keep coming back. Tracked down with this Coccinelle semantic patch: @r@ expression err, eno, cls, fmt; position p; @@ ( error_report(fmt, ...)@p | error_set(err, cls, fmt, ...)@p | error_set_errno(err, eno, cls, fmt, ...)@p | error_setg(err, fmt, ...)@p | error_setg_errno(err, eno, fmt, ...)@p ) @script:python@ fmt << r.fmt; p << r.p; @@ if "\\n" in str(fmt): print "%s:%s:%s:%s" % (p[0].file, p[0].line, p[0].column, fmt) Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-id: 1360354939-10994-4-git-send-email-armbru@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* target-i386: Remove setting tsc-frequency from x86_def_tIgor Mammedov2013-01-271-3/+0
| | | | | | | | | | | | | | | | | Setting tsc-frequency from x86_def_t is NOP because default tsc_khz in x86_def_t is 0 and CPUX86State.tsc_khz is also initialized to 0 by default. So there is no need to overwrite tsc_khz with default 0 because field was already initialized to 0. Custom tsc-frequency setting is not affected due to it being set without using x86_def_t. Field tsc_khz in x86_def_t becomes unused with this patch, so drop it as well. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Set custom features/properties without intermediate x86_def_tIgor Mammedov2013-01-271-67/+51
| | | | | | | | | | | | | | | | | | | | | | | | | Move custom features parsing after built-in cpu_model defaults are set and set custom features directly on CPU instance. That allows to make a clear distinction between built-in cpu model defaults that eventually should go into class_init() and extra property setting which is done after defaults are set on CPU instance. Impl. details: * use object_property_parse() property setter so it would be a mechanical change to switch to global properties later. * And after all current features/properties are converted into static properties, it will take a trivial patch to switch to global properties. Which will allow to: * get CPU instance initialized with all parameters passed on -cpu ... cmd. line from object_new() call. * call cpu_model/featurestr parsing only once before CPUs are created * open a road for removing CPUxxxState.cpu_model_str field, when other CPUs are similarly converted to subclasses and static properties. - re-factor error handling, to use Error instead of fprintf()s, since it is anyway passed in for property setter. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Remove vendor_override field from CPUX86StateIgor Mammedov2013-01-271-15/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8935499831312 makes cpuid return to guest host's vendor value instead of built-in one by default if kvm_enabled() == true and allows to override this behavior if 'vendor' is specified on -cpu command line. But every time guest calls cpuid to get 'vendor' value, host's value is read again and again in default case. It complicates semantics of vendor property and makes it harder to use. Instead of reading 'vendor' value from host every time cpuid[vendor] is called, override 'vendor' value only once in cpu_x86_find_by_name(), when built-in CPU model is found and if(kvm_enabled() == true). It provides the same default semantics if (kvm_enabled() == true) vendor = host's vendor else vendor = built-in vendor and then later: if (custom vendor) vendor = custom vendor 'vendor' value is overridden when user provides it on -cpu command line, and there is no need for vendor_override field anymore, remove it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Replace uint32_t vendor fields by vendor string in x86_def_tIgor Mammedov2013-01-271-103/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vendor property setter takes string as vendor value but cpudefs use uint32_t vendor[123] fields to define vendor value. It makes it difficult to unify and use property setter for values from cpudefs. Simplify code by using vendor property setter, vendor[123] fields are converted into vendor[13] array to keep its value. And vendor property setter is used to access/set value on CPU. - Make for() cycle reusable for the next patch by adding x86_cpu_vendor_words2str() Intel's CPUID spec[1] says: " 5.1.1 ... These registers contain the ASCII string: GenuineIntel ... " List[2] of known vendor values shows that they all are 12 ASCII characters long, padded where necessary with space. Current supported values are all ASCII characters packed in ebx, edx, ecx. So lets state that QEMU supports 12 printable ASCII characters packed in ebx, edx, ecx registers for cpuid(0) instruction. *1 - http://www.intel.com/Assets/PDF/appnote/241618.pdf *2 - http://en.wikipedia.org/wiki/CPUID#EAX.3D0:_Get_vendor_ID Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Print deprecation warning if xlevel < 0x80000000Igor Mammedov2013-01-271-0/+2
| | | | | | Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Drop redundant list of CPU definitionsAndreas Färber2013-01-271-12/+10
| | | | | | | | | It is no longer needed since dropping cpudef config file support. Cleaning this up removes knowledge about other models from x86_def_t, in preparation for reusing x86_def_t as intermediate step towards pure QOM X86CPU subclasses. Signed-off-by: Andreas Färber <afaerber@suse.de>
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